PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 381

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PIC18F67K22-I/MR

Manufacturer Part Number
PIC18F67K22-I/MR
Description
128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F67K22-I/MR

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F67K22-I/MRRSL
Manufacturer:
FSC
Quantity:
250
26.2
To set up the HLVD module:
1.
2.
3.
4.
5.
 2009-2011 Microchip Technology Inc.
Note:
Select the desired HLVD trip point by writing the
value to the HLVDL<3:0> bits.
Set the VDIRMAG bit to detect high voltage
(VDIRMAG = 1 ) or low voltage (VDIRMAG = 0 ).
Enable the HLVD module by setting the
HLVDEN bit.
Clear the HLVD interrupt flag (PIR2<2>), which
may have been set from a previous interrupt.
If interrupts are desired, enable the HLVD inter-
rupt by setting the HLVDIE and GIE bits
(PIE2<2> and INTCON<7>, respectively).
An interrupt will not be generated until the
IRVST bit is set.
HLVD Setup
Before changing any module settings
(V
module (LVDEN = 0 ), make the changes
and re-enable the module. This prevents
the generation of false HLVD events.
DIRMAG
, LVDL<3:0>), first disable the
PIC18F87K22 FAMILY
26.3
When the module is enabled, the HLVD comparator
and voltage divider are enabled and consume static
current. The total current consumption, when enabled,
is specified in electrical specification Parameter D022B
(Table
Depending on the application, the HLVD module does
not need to operate constantly. To reduce current
requirements, the HLVD circuitry may only need to be
enabled for short periods where the voltage is checked.
After such a check, the module could be disabled.
26.4
The internal reference voltage of the HLVD module,
specified in electrical specification Parameter
(
used by other internal circuitry, such as the
programmable Brown-out Reset. If the HLVD or other
circuits using the voltage reference are disabled to
lower the device’s current consumption, the reference
voltage circuit will require time to become stable before
a low or high-voltage condition can be reliably
detected. This start-up time, T
is independent of device clock speed. It is specified in
electrical specification Parameter
The HLVD interrupt flag is not enabled until T
expired and a stable reference voltage is reached. For
this reason, brief excursions beyond the set point may
not be detected during this interval (see
Figure
Section 31.0 “Electrical Characteristics”
31-13).
26-3).
Current Consumption
HLVD Start-up Time
IRVST
37 (Table
DS39960D-page 381
, is an interval that
Figure 26-2
31-13).
), may be
IRVST
has
37
or

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