PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 265

• Manufacturer Part Number: PIC18F67K22-I/MR
• Description: 128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 18Fr

Specifications of PIC18F67K22-I/MR

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 64MHz
• Connectivity: I²C, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (64K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

20.4
The Enhanced PWM mode can generate a PWM signal
on up to four different output pins with up to 10 bits of
resolution. It can do this through four different PWM
Output modes:
• Single PWM
• Half-Bridge PWM
• Full-Bridge PWM, Forward mode
• Full-Bridge PWM, Reverse mode
To select an Enhanced PWM mode, the PxM bits of the
CCPxCON register must be set appropriately.
FIGURE 20-3:
 2009-2011 Microchip Technology Inc.
Note 1: The TRIS register value for each PWM output must be configured appropriately.
Note 1: The 8-bit TMR2 register is concatenated with the 2-bit internal Q clock, or 2 bits of the prescaler to create
CCPR1H (Slave)
2: Any pin not used by an Enhanced PWM mode is available for alternate pin functions.
PWM (Enhanced Mode)
Comparator
Duty Cycle Registers
CCPR1L
PR2
TMR2
Comparator
the 10-bit time base.
EXAMPLE SIMPLIFIED BLOCK DIAGRAM OF THE ENHANCED PWM MODE
(Note 1)
Clear Timer2,
Toggle PWM Pin and
Latch Duty Cycle
DC1B<1:0>
R
S
PxM<1:0>
Q
ECCP1DEL
Controller
ECCPx/PxA
Output
2
PIC18F87K22 FAMILY
The PWM outputs are multiplexed with I/O pins and are
designated: PxA, PxB, PxC and PxD. The polarity of the
PWM pins is configurable and is selected by setting the
CCPxM bits in the CCPxCON register appropriately.
Table 20-1
Enhanced PWM mode.
Figure 20-3
diagram of the Enhanced PWM module.
Note:
PxB
PxC
PxD
4
CCPxM<3:0>
TRIS
TRIS
TRIS
TRIS
To
incomplete waveform when the PWM is
first enabled, the ECCP module waits until
the start of a new PWM period before
generating a PWM signal.
provides the pin assignments for each
provides an example of a simplified block
prevent
the
generation
ECCP1/Output Pi
Output Pi
Output Pi
Output Pi
DS39960D-page 265
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