PIC18F67K22-I/MR Microchip Technology, PIC18F67K22-I/MR Datasheet - Page 310

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PIC18F67K22-I/MR

Manufacturer Part Number
PIC18F67K22-I/MR
Description
128kB Flash, 4kB RAM, 1kB EE, NanoWatt XLP, GP 64 QFN 9x9x0.9mm TUBE
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr
Datasheet

Specifications of PIC18F67K22-I/MR

Core Processor
PIC
Core Size
8-Bit
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC18F67K22-I/MRRSL
Manufacturer:
FSC
Quantity:
250
PIC18F87K22 FAMILY
21.4.5
The addressing procedure for the I
the first byte after the Start condition usually
determines which device will be the slave addressed by
the master. The exception is the general call address
which can address all devices. When this address is
used, all devices should, in theory, respond with an
Acknowledge.
The general call address is one of eight addresses
reserved for specific purposes by the I
consists of all ‘0’s with R/W = 0.
The general call address is recognized when the
General
(SSPxCON2<7> set). Following a Start bit detect, eight
bits are shifted into the SSPxSR and the address is
compared against the SSPxADD. It is also compared to
the general call address and fixed in hardware.
FIGURE 21-17:
DS39960D-page 310
SDAx
SCLx
SSPxIF
BF (SSPxSTAT<0>)
SSPOV (SSPxCON1<6>)
GCEN (SSPxCON2<7>)
Call
GENERAL CALL ADDRESS
SUPPORT
Enable
S
SLAVE MODE GENERAL CALL ADDRESS SEQUENCE
(7 OR 10-BIT ADDRESSING MODE)
bit,
1
2
GCEN,
General Call Address
2
C bus is such that
3
2
4
C protocol. It
is
5
enabled
6
7
R/W = 0
8
ACK
If the general call address matches, the SSPxSR is
transferred to the SSPxBUF, the BF flag bit is set
(eighth bit), and on the falling edge of the ninth bit (ACK
bit), the SSPxIF interrupt flag bit is set.
When the interrupt is serviced, the source for the
interrupt can be checked by reading the contents of the
SSPxBUF. The value can be used to determine if the
address was device-specific or a general call address.
In 10-Bit Addressing mode, the SSPxADD is required
to be updated for the second half of the address to
match and the UA bit is set (SSPxSTAT<1>). If the gen-
eral call address is sampled when the GCEN bit is set,
while the slave is configured in 10-Bit Addressing
mode, then the second half of the address is not
necessary, the UA bit will not be set and the slave will
begin
(Figure
Address is Compared to General Call Address
After ACK, Set Interrupt
9
D7
1
21-17).
receiving
D6
2
Cleared in Software
SSPxBUF is Read
Receiving Data
D5
3
 2009-2011 Microchip Technology Inc.
D4
4
data
D3
5
after
D2
6
D1
7
the
D0
8
Acknowledge
ACK
9
‘0’
‘1’

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