MPC8360EVVALFHA Freescale Semiconductor, MPC8360EVVALFHA Datasheet - Page 20

• Manufacturer Part Number: MPC8360EVVALFHA
• Description: IC MPU POWERQUICC II PRO 740TBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8360EVVALFHA

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 667MHz
• Voltage: 1.3V
• Mounting Type: Surface Mount
• Package / Case: 740-TBGA
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 667MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: TBGA
• No. Of Pins: 740
• Rohs Compliant: Yes
• Family Name: MPC83xx
• Device Core: PowerQUICC II Pro
• Device Core Size: 32b
• Frequency (max): 667MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.3V
• Operating Supply Voltage (max): 1.35V
• Operating Supply Voltage (min): 1.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 740
• Package Type: TBGA
• For Use With: MPC8360EA-MDS-PB - KIT APPLICATION DEV 8360 SYSTEMMPC8360E-RDK - BOARD REFERENCE DESIGN FOR MPC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

DDR and DDR2 SDRAM
6
This section describes the DC and AC electrical specifications for the DDR and DDR2 SDRAM interface
of the MPC8360E/58E.
6.1
Table 14
device when GV
20
UART/async HDLC
BISYNC
USB
Notes:
1. The QUICC Engine module needs to run at a frequency higher than or equal to what is listed in this table.
2. ‘F’ is the actual interface operating frequency.
3. The bit rate limit is independent of the data bus width (that is, the same for serial, nibble, or octal interfaces).
4. TDM in high-speed mode for serial data interface.
I/O supply voltage
I/O reference voltage
I/O termination voltage
Input high voltage
Input low voltage
Output leakage current
Output high current (V
Output low current (V
MV
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 4
REF
input leakage current
DDR and DDR2 SDRAM
provides the recommended operating conditions for the DDR2 SDRAM component(s) of the
DDR and DDR2 SDRAM DC Electrical Characteristics
Parameter/Condition
Table 13. QUICC Engine Block Operating Frequency Limitations (continued)
Table 14. DDR2 SDRAM DC Electrical Characteristics for GV
Interface
DD
OUT
OUT
(typ) = 1.8 V
= 0.280 V)
= 1.420 V)
.
3.68 (max internal ref
Symbol
Interface Operating
MV
GV
Frequency (MHz)
I
VREF
V
V
I
I
I
V
OZ
OH
OL
TT
REF
IH
48 (ref clock)
IL
DD
2 (max)
clock)
MV
MV
0.49 × GV
REF
REF
–13.4
1.71
–0.3
13.4
Min
—
—
+ 0.125
– 0.04
Max Interface Bit
DD
Rate (Mbps)
115 (Kbps)
12
2
MV
MV
0.51 × GV
GV
REF
REF
DD
Max
1.89
DD
±10
±10
—
—
– 0.125
+ 0.04
+ 0.3
(typ) = 1.8 V
Min QUICC Engine
Frequency
DD
Operating
Freescale Semiconductor
20
20
96
1
(MHz)
Unit
mA
mA
μA
μA
V
V
V
V
V
Notes
Notes
—
—
—
—
—
—
—
—
1
2
3
4