MPC8360EVVALFHA Freescale Semiconductor, MPC8360EVVALFHA Datasheet - Page 96

• Manufacturer Part Number: MPC8360EVVALFHA
• Description: IC MPU POWERQUICC II PRO 740TBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8360EVVALFHA

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 667MHz
• Voltage: 1.3V
• Mounting Type: Surface Mount
• Package / Case: 740-TBGA
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 667MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: TBGA
• No. Of Pins: 740
• Rohs Compliant: Yes
• Family Name: MPC83xx
• Device Core: PowerQUICC II Pro
• Device Core Size: 32b
• Frequency (max): 667MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.3V
• Operating Supply Voltage (max): 1.35V
• Operating Supply Voltage (min): 1.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 740
• Package Type: TBGA
• For Use With: MPC8360EA-MDS-PB - KIT APPLICATION DEV 8360 SYSTEMMPC8360E-RDK - BOARD REFERENCE DESIGN FOR MPC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

Clocking
1
The following steps describe how to use
96
Conf
No.
s1h
s2h
s3h
s4h
s5h
s6h
s7h
s8h
s9h
c1h
c2h
c3h
c4h
c5h
c5
c6
The Conf No. consist of prefix, an index and a postfix. The prefix “s” and “c” stands for “syset” and “ce” respectively. The postfix
“h” stands for “high input clock.’”The index is a serial number.
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 4
1. Choose the up or down sections in the table according to input clock rate 33 MHz or 66 MHz.
2. Select a suitable CSB and core clock rates from
3. Select a suitable QUICC Engine block clock rate from
4. Insert the chosen SPMF, COREPLL, CEPMF and CEPDF to the RCWL fields, respectively.
1
configuration bits.
configuration bits.
SPMF
0011
0011
0011
0100
0100
0100
0101
0101
0101
æ
æ
æ
æ
æ
æ
æ
0000110
0000101
0000110
0000011
0000100
0000101
0000010
0000011
0000100
CORE
PLL
æ
æ
æ
æ
æ
æ
æ
CEPMF
10000
10001
00101
00110
00111
01000
01001
Table 76. Suggested PLL Configurations (continued)
æ
æ
æ
æ
æ
æ
æ
æ
æ
CEPDF
66 MHz CLKIN/PCI_SYNC_IN Options
æ
æ
æ
æ
æ
æ
æ
æ
æ
0
0
0
0
0
0
0
Table
Clock Freq
(MHz)
Input
33
33
66
66
66
66
66
66
66
66
66
66
66
66
66
66
76. See
CSB Freq
Example
(MHz)
Table
200
200
200
266
266
266
333
333
333
—
—
—
—
—
—
—
76. Copy the SPMF and CORE PLL
Table
Core Freq
1.
(MHz)
400
500
600
400
533
667
333
500
667
—
—
—
—
—
—
—
76. Copy the CEPMF and CEPDF
Freq (MHz)
Engine
QUICC
533
566
333
400
466
533
600
—
—
—
—
—
—
—
—
—
Freescale Semiconductor
(MHz)
400
—
—
—
—
—
—
—
—
—
—
—
∞
∞
∞
∞
∞
(MHz)
533
—
—
—
—
—
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
(MHz)
667
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞
∞