MPC8360EVVALFHA Freescale Semiconductor, MPC8360EVVALFHA Datasheet - Page 38

• Manufacturer Part Number: MPC8360EVVALFHA
• Description: IC MPU POWERQUICC II PRO 740TBGA
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC II PROr

Specifications of MPC8360EVVALFHA

• Processor Type: MPC83xx PowerQUICC II Pro 32-Bit
• Speed: 667MHz
• Voltage: 1.3V
• Mounting Type: Surface Mount
• Package / Case: 740-TBGA
• Core Size: 32 Bit
• Program Memory Size: 64KB
• Cpu Speed: 667MHz
• Embedded Interface Type: I2C, SPI, USB, UART
• Digital Ic Case Style: TBGA
• No. Of Pins: 740
• Rohs Compliant: Yes
• Family Name: MPC83xx
• Device Core: PowerQUICC II Pro
• Device Core Size: 32b
• Frequency (max): 667MHz
• Instruction Set Architecture: RISC
• Supply Voltage 1 (typ): 1.3V
• Operating Supply Voltage (max): 1.35V
• Operating Supply Voltage (min): 1.25V
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 740
• Package Type: TBGA
• For Use With: MPC8360EA-MDS-PB - KIT APPLICATION DEV 8360 SYSTEMMPC8360E-RDK - BOARD REFERENCE DESIGN FOR MPC
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Features: -
• Lead Free Status / Rohs Status: Compliant

UCC Ethernet Controller: Three-Speed Ethernet, MII Management
8.2.5
Table 35
38
At recommended operating conditions with LV
Data to clock output skew (at transmitter)
Data to clock input skew (at receiver)
Clock cycle duration
Duty cycle for 1000Base-T
Duty cycle for 10BASE-T and 100BASE-TX
Rise time (20–80%)
Fall time (20–80%)
GTX_CLK125 reference clock period
GTX_CLK125 reference clock duty cycle
Notes:
1. Note that, in general, the clock reference symbol representation for this section is based on the symbols RGT to represent
2. This implies that PC board design will require clocks to be routed such that an additional trace delay of greater than 1.5 ns
3. For 10 and 100 Mbps, t
4. Duty cycle may be stretched/shrunk during speed changes or while transitioning to a received packet's clock domains as long
5. Duty cycle reference is LV
6. This symbol is used to represent the external GTX_CLK125 and does not follow the original symbol naming convention.
7. In rev. 2.0 silicon, due to errata, t
RGMII and RTBI timing. For example, the subscript of t
notation for rise (R) and fall (F) times follows the clock symbol that is being represented. For symbols representing skews,
the subscript is skew (SK) followed by the clock that is being skewed (RGT).
will be added to the associated clock signal.
as the minimum duty cycle is not violated and stretching occurs for no more than three t
between.
option 1, and 1.8 ns for UCC2 option 2. In rev. 2.1 silicon, due to errata, t
and –0.9 for UCC2 option 2, and t
Refer to Errata QE_ENET10 in Chip Errata for the MPC8360E, Rev. 1 . UCC1 does meet t
silicon.
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 4
presents the RGMII and RTBI AC timing specifications.
RGMII and RTBI AC Timing
Parameter/Condition
RGT
DD
scales to 400 ns ± 40 ns and 40 ns ± 4 ns, respectively.
/2.
Table 35. RGMII and RTBI AC Timing Specifications
SKRGTKHDX
SKRGTKHDV
DD
of 2.5 V ± 5%.
minimum is –2.3 ns and t
maximum is 0.75 ns for UCC1 and UCC2 option 1 and 0.85 for UCC2 option 2.
t
t
t
t
t
SKRGTKHDX
SKRGTKHDV
t
t
G125H
SKRGDXKH
SKRGDVKH
RGTH
RGTH
Symbol
RGT
t
t
t
t
RGTR
RGTF
G125
RGT
Specifications
/t
/t
/t
represents the TBI (T) receive (Rx) clock. Note also that the
RGT
RGT
G125
1
SKRGTKHDV
–0.5
Min
1.0
7.2
45
40
47
—
—
—
—
—
SKRGTKHDX
maximum is 1 ns for UCC1, 1.2 ns for UCC2
minimum is –0.65 ns for UCC2 option 1
Typ
8.0
8.0
50
50
—
—
—
—
—
RGT
SKRGTKHDX
of the lowest speed transitioned
Max
0.75
0.75
0.5
2.6
8.8
55
60
53
—
—
—
Freescale Semiconductor
minimum for rev. 2.1
Unit
ns
ns
ns
ns
ns
ns
%
%
%
Notes
4, 5
3, 5
—
—
—
7
2
3
6