MPC8360EVVALFHA Freescale Semiconductor, MPC8360EVVALFHA Datasheet - Page 43

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MPC8360EVVALFHA

Manufacturer Part Number
MPC8360EVVALFHA
Description
IC MPU POWERQUICC II PRO 740TBGA
Manufacturer
Freescale Semiconductor
Series
PowerQUICC II PROr
Datasheet

Specifications of MPC8360EVVALFHA

Processor Type
MPC83xx PowerQUICC II Pro 32-Bit
Speed
667MHz
Voltage
1.3V
Mounting Type
Surface Mount
Package / Case
740-TBGA
Core Size
32 Bit
Program Memory Size
64KB
Cpu Speed
667MHz
Embedded Interface Type
I2C, SPI, USB, UART
Digital Ic Case Style
TBGA
No. Of Pins
740
Rohs Compliant
Yes
Family Name
MPC83xx
Device Core
PowerQUICC II Pro
Device Core Size
32b
Frequency (max)
667MHz
Instruction Set Architecture
RISC
Supply Voltage 1 (typ)
1.3V
Operating Supply Voltage (max)
1.35V
Operating Supply Voltage (min)
1.25V
Operating Temp Range
0C to 70C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
740
Package Type
TBGA
For Use With
MPC8360EA-MDS-PB - KIT APPLICATION DEV 8360 SYSTEMMPC8360E-RDK - BOARD REFERENCE DESIGN FOR MPC
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Features
-
Lead Free Status / Rohs Status
Compliant

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Quantity
Price
Part Number:
MPC8360EVVALFHA
Manufacturer:
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Quantity:
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Part Number:
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Manufacturer:
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Table 41
Freescale Semiconductor
Local bus clock to output high impedance for LAD/LDP
Notes:
1. The symbols used for timing specifications follow the pattern of t
2. All timings are in reference to rising edge of LSYNC_IN.
3. All signals are measured from OV
4. Input timings are measured at the pin.
5. t
6. t
7. t
8. For purposes of active/float timing measurements, the Hi-Z or off-state is defined to be when the total current delivered
Local bus cycle time
Input setup to local bus clock
Input hold from local bus clock
LALE output fall to LAD output transition (LATCH hold time)
LALE output fall to LAD output transition (LATCH hold time)
LALE output fall to LAD output transition (LATCH hold time)
Local bus clock to output valid
inputs and t
timing (LB) for the input (I) to go invalid (X) with respect to the time the t
clock one (1). Also, t
the output (O) going invalid (X) or output hold time.
signaling levels.
load on LAD output pins.
on LAD output pins.
pins.
through the component pin is less than or equal to the leakage current specification.
MPC8360E/MPC8358E PowerQUICC II Pro Processor Revision 2.x TBGA Silicon Hardware Specifications, Rev. 4
LBOTOT1
LBOTOT2
LBOTOT3
describes the general timing parameters of the local bus interface of the device.
should be used when RCWH[LALE] is not set and when the load on LALE output pin is at least 10 pF less than the
should be used when RCWH[LALE] is set and when the load on LALE output pin is at least 10 pF less than the load
should be used when RCWH[LALE] is set and when the load on LALE output pin equals to the load on LAD output
(first two letters of functional block)(reference)(state)(signal)(state)
Table 40. Local Bus General Timing Parameters—DLL Enabled (continued)
Table 41. Local Bus General Timing Parameters—DLL Bypass Mode
LBKHOX
Parameter
Parameter
symbolizes local bus timing (LB) for the t
DD
/2 of the rising edge of LSYNC_IN to 0.4 × OV
(first two letters of functional block)(signal)(state)(reference)(state)
for outputs. For example, t
Symbol
t
t
t
t
LBOTOT1
LBOTOT2
LBOTOT3
t
t
LBKHOV
LBIVKH
LBIXKH
Symbol
LBK
t
t
LBKHOZ
LBK
LBK
clock reference (K) to go high (H), with respect to
clock reference (K) goes high (H), in this case for
1
1
DD
Min
Min
1.0
1.5
2.5
15
7
3
of the signal in question for 3.3-V
LBIXKH1
Max
Max
3.8
3
symbolizes local bus
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
Local Bus
Notes
Notes
3, 4
3, 4
for
2
5
6
7
3
43

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