PIC16F716-I/P Microchip Technology Inc., PIC16F716-I/P Datasheet - Page 13

• Manufacturer Part Number: PIC16F716-I/P
• Description: 18 PIN, 3.5 KB FLASH, 128 RAM, 13 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F716-I/P

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

2.2.2.1
The Status register, shown in Register 2-1, contains the
arithmetic status of the ALU, the Reset status and the
bank select bits for data memory.
The Status register can be the destination for any
instruction, as with any other register. If the Status
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
Status register as destination may be different than
intended.
For example, CLRF STATUS will clear the upper-three
bits and set the Z bit. This leaves the Status register as
000u u1uu (where u = unchanged).
REGISTER 2-1:
 2003 Microchip Technology Inc.
bit 7
bit 6-5
bit 4
bit 3
bit 2
bit 1
bit 0
Status Register
STATUS REGISTER (ADDRESS: 03h, 83h)
bit 7
IRP: Register Bank Select bit (used for indirect addressing)
1 = Bank 2, 3 (100h – 1FFh)
0 = Bank 0, 1 (00h – FFh)
RP1
01 = Bank 1 (80h – FFh)
00 = Bank 0 (00h – 7Fh)
Each bank is 128 bytes
TO: Time-out bit
1 = After power-up, CLRWDT instruction or SLEEP instruction
0 = A WDT time-out occurred
PD: Power-down bit
1 = After power-up or by the CLRWDT instruction
0 = By execution of the SLEEP instruction
Z: Zero bit
1 = The result of an arithmetic or logic operation is zero
0 = The result of an arithmetic or logic operation is not zero
DC: Digit carry/borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions) (for borrow the polarity
is reversed)
1 = A carry-out from the 4th low order bit of the result occurred
0 = No carry-out from the 4th low order bit of the result
C: Carry/borrow bit (ADDWF, ADDLW,SUBLW,SUBWF instructions)
1 = A carry-out from the Most Significant bit of the result occurred
0 = No carry-out from the Most Significant bit of the result occurred
Note 1:
Legend:
R = Readable bit
-n = Value at POR
R/W-0
IRP
(1)
(1)
2:
:RP0: Register Bank Select bits (used for direct addressing)
Reserved, maintain clear
For borrow the polarity is reversed. A subtraction is executed by adding the two’s
complement of the second operand. For rotate (RRF, RLF) instructions, this bit is
loaded with either the high or low order bit of the source register.
RP1
R/W-0
(1)
R/W-0
RP0
Preliminary
W = Writable bit
‘1’ = Bit is set
R-1
TO
It is recommended, therefore, that only BCF, BSF,
SWAPF and MOVWF instructions are used to alter the
Status register because these instructions do not affect
the Z, C or DC bits from the Status register. For other
instructions, not affecting any Status bits, see the
“Instruction Set Summary.”
Note 1: The PIC16F716 does not use bits IRP
2: The C and DC bits operate as a borrow
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R-1
PD
and RP1 (STATUS<7:6>). Maintain these
bits clear to ensure upward compatibility
with future products.
and digit borrow bit, respectively, in sub-
traction. See the SUBLW and SUBWF
instructions for examples.
(1)
R/W-x
(2)
Z
PIC16F716
x = Bit is unknown
R/W-x
DC
DS41206A-page 11
R/W-x
C
bit 0