PIC16F716-I/P Microchip Technology Inc., PIC16F716-I/P Datasheet - Page 73

• Manufacturer Part Number: PIC16F716-I/P
• Description: 18 PIN, 3.5 KB FLASH, 128 RAM, 13 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F716-I/P

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

10.0
Each PIC16F716 instruction is a 14-bit word divided
into an opcode which specifies the instruction type and
one or more operands which further specify the
operation of the instruction. The PIC16F716 instruction
set summary in Table 10-2 lists byte-oriented, bit-
oriented,
Table 10-1 shows the opcode field descriptions.
For byte-oriented instructions, ‘f’ represents a file
register designator and ‘d’ represents a destination
designator. The file register designator specifies which
file register is to be used by the instruction.
The destination designator specifies where the result of
the operation is to be placed. If ‘d’ is zero, the result is
placed in the W register. If ‘d’ is one, the result is placed
in the file register specified in the instruction.
For bit-oriented instructions, ‘b’ represents a bit field
designator which selects the number of the bit affected
by the operation, while ‘f’ represents the number of the
file in which the bit is located.
For literal and control operations, ‘k’ represents an
eight or eleven bit constant or literal value.
TABLE 10-1:
 2003 Microchip Technology Inc.
f
W
b
k
x
d
label
TOS
PC
PCLATH Program Counter High Latch
GIE
WDT
TO
PD
dest
[ ]
( )
< >
italics
Field
Register file address (0x00 to 0x7F)
Working register (accumulator)
Bit address within an 8-bit file register
Literal field, constant data or label
Don't care location (= 0 or 1)
The assembler will generate code with x = 0. It is the rec-
ommended form of use for compatibility with all Microchip
software tools.
Destination select; d = 0: store result in W,
d = 1: store result in file register f.
Default is d = 1
Label name
Top of Stack
Program Counter
Global Interrupt Enable bit
Watchdog Timer/Counter
Time-out bit
Power-down bit
Destination either the W register or the specified register
file location
Options
Contents
Assigned to
Register bit field
In the set of
User defined term (font is courier)
INSTRUCTION SET SUMMARY
and
literal
OPCODE FIELD
DESCRIPTIONS
Description
and
control
operations.
Preliminary
The instruction set is highly orthogonal and is grouped
into three basic categories:
• Byte-oriented operations
• Bit-oriented operations
• Literal and control operations
All instructions are executed within one single
instruction cycle, unless a conditional test is true or the
program counter is changed as a result of an
instruction. In this case, the execution takes two
instruction cycles with the second cycle executed as a
NOP. One instruction cycle consists of four oscillator
periods. Thus, for an oscillator frequency of 4 MHz, the
normal instruction execution time is 1 s. If a
conditional test is true or the program counter is
changed as a result of an instruction, the instruction
execution time is 2 s.
Table 10-2 lists the instructions recognized by the
MPASM™ assembler.
Figure 10-1 shows the three general formats that the
instructions can have.
All examples use the following format to represent a
hexadecimal number:
where h signifies a hexadecimal digit.
FIGURE 10-1:
Note 1: Any unused opcode is reserved. Use of
Byte-oriented file register operations
Bit-oriented file register operations
Literal and control operations
General
CALL and GOTO instructions only
13
13
13
13
2: To maintain upward compatibility with
0xhh
d = 0 for destination W
d = 1 for destination f
f = 7-bit file register address
b = 3-bit address
f = 7-bit file register address
k = 8-bit immediate value
k = 11-bit immediate value
OPCODE
OPCODE
OPCODE
any
unexpected operation.
future PICmicro products, do not use the
OPTION and TRIS instructions.
OPCODE
11 10
reserved
GENERAL FORMAT FOR
INSTRUCTIONS
10 9
8
b (BIT #)
PIC16F716
d
7
8 7
k (literal)
6
opcode
7
6
f (FILE #)
k (literal)
DS41206A-page 71
f (FILE #)
may
cause
0
0
0
0