PIC16F716-I/P Microchip Technology Inc., PIC16F716-I/P Datasheet - Page 35

• Manufacturer Part Number: PIC16F716-I/P
• Description: 18 PIN, 3.5 KB FLASH, 128 RAM, 13 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F716-I/P

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

7.0
The
module contains a 16-bit register, which can operate
as:
• 16-bit Capture register
• 16-bit Compare register
• PWM Master/Slave Duty Cycle register
Table 7-1 shows the timer resources of the ECCP
module modes.
Capture/Compare/PWM
comprised of two 8-bit registers: CCPR1L (low byte)
and CCPR1H (high byte).
REGISTER 7-1:
 2003 Microchip Technology Inc.
ECCP
ENHANCED CAPTURE/
COMPARE/PWM (ECCP)
MODULE
bit 7-6
bit 5-4
bit 3-0
(Enhanced
CCP1CON REGISTER (ADDRESS: 17h)
bit 7
P1M1:P1M0: PWM Output Configuration bits
CCP1M<3:2> = 00, 01, 10
xx = P1A assigned as Capture/Compare I/O. P1B, P1C, P1D assigned as Port pins.
CCP1M<3:2> = 11
00 = Single output, P1A modulated. P1B, P1C, P1D assigned as Port pins.
01 = Quad output forward. P1D modulated, P1A active. P1B and P1C inactive.
10 = Dual output. P1A, P1B modulated with dead-time control. P1C, P1D assigned as port pins.
11 = Quad output reverse. P1B modulated, P1C active. P1A and P1D inactive.
DC1B1:DC1B0: PWM Least Significant bits
Capture mode: Unused
Compare mode: Unused
PWM mode: These bits are the two LSbs of the PWM duty cycle. The eight MSbs are found
CCP1M3:CCP1M0: ECCP Mode Select bits
0000 = Capture/Compare/PWM off (resets ECCP module)
0001 = Unused (Reserved)
0010 = Compare mode, toggle output on match (CCP1IF bit is set)
0011 = Unused (Reserved)
0100 = Capture mode, every falling edge
0101 = Capture mode, every rising edge
0110 = Capture mode, every 4th rising edge
0111 = Capture mode, every 16th rising edge
1000 = Compare mode, set CCP1 output on match (CCP1IF bit is set)
1001 = Compare mode, clear CCP1 output on match (CCP1IF bit is set)
1010 = Compare mode, generate software interrupt on match (CCP1IF bit is set, CCP1 pin is unaffected)
1011 = Compare mode, trigger special event (CCP1IF bit is set, TMR1 is reset, and an A/D conversion is
1100 = PWM mode. P1A, P1C active-high; P1B, P1D active-high.
1101 = PWM mode. P1A, P1C active-high; P1B, P1D active-low.
1110 = PWM mode. P1A, P1C active-low; P1B, P1D active-high.
1111 = PWM mode. P1A, P1C active-low; P1B, P1D active-low.
Legend:
R = Readable bit
-n = Value at POR
R/W-0
P1M1
Register
Capture/Compare/PWM)
started if the A/D module is enabled. CCP1 pin is unaffected).
in CCPR1L.
R/W-0
1
P1M0
(CCPR1)
DC1B1
R/W-0
Preliminary
W = Writable bit
‘1’ = Bit is set
is
DC1B0
R/W-0
The CCP1CON register controls ECCP operation. All
the CCP1CON bits are readable and writable.
Additional information on the ECCP module is available
in the PICmicro
(DS33023).
TABLE 7-1:
Capture
Compare
PWM
ECCP Mode
CCP1M3
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
®
ECCP MODE - TIMER
RESOURCE
Mid-Range Reference Manual,
CCP1M2
R/W-0
PIC16F716
x = Bit is unknown
Timer Resource
CCP1M1
R/W-0
DS41206A-page 33
Timer1
Timer1
Timer2
CCP1M0
R/W-0
bit 0