PIC16F716-I/P Microchip Technology Inc., PIC16F716-I/P Datasheet - Page 52

• Manufacturer Part Number: PIC16F716-I/P
• Description: 18 PIN, 3.5 KB FLASH, 128 RAM, 13 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F716-I/P

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F716
REGISTER 8-2:
The ADRES register contains the result of the A/D
conversion. When the A/D conversion is complete, the
result is loaded into the ADRES register, the GO/DONE
bit (ADCON0<2>) is cleared and the A/D interrupt flag
bit ADIF is set. The block diagram of the A/D module is
shown in Figure 8-1.
The value that is in the ADRES register is not modified
for any Reset. The ADRES register will contain
unknown data after a Power-on Reset.
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 8.1
“A/D
acquisition time has elapsed, the A/D conversion can
be started. The following steps should be followed for
doing an A/D conversion:
DS41206A-page 50
Acquisition
bit 7-3
bit 2-0
ADCON1 REGISTER (ADDRESS: 9Fh)
Requirements”.
Unimplemented: Read as '0'
PCFG2:PCFG0: A/D Port Configuration Control bits
Legend:
R = Readable bit
-n = Value at POR
bit 7
U-0
—
U-0
—
0x0
0x1
100
101
11x
Legend:
PCFG2:PCFG0
After
Preliminary
this
U-0
W = Writable bit
‘1’ = Bit is set
—
A = Analog input, D = Digital I/O
V
V
AN3
RA3
REF
REF
A
A
D
1.
2.
3.
4.
5.
6.
7.
U-0
—
Configure the A/D module:
Configure A/D interrupt (if desired):
Wait the required acquisition time.
Start conversion:
Wait for A/D conversion to complete, by either:
OR
Read A/D Result register (ADRES), clear bit
ADIF if required.
For the next conversion, go to step 1 or step 2
as required. The A/D conversion time per bit is
defined as T
required before next acquisition starts.
AN2
RA2
- Configure analog pins/voltage reference/
- Select A/D input channel (ADCON0)
- Select A/D conversion clock (ADCON0)
- Turn on A/D module (ADCON0)
- Clear ADIF bit
- Set ADIE bit
- Set GIE bit
- Set GO/DONE bit (ADCON0)
- Polling for the GO/DONE bit to be cleared
- Waiting for the A/D interrupt
D
D
D
A
A
and digital I/O (ADCON1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
AN2
RA1
U-0
—
D
A
A
A
A
AD
. A minimum wait of 2T
AN0
RA0
A
A
A
A
D
PCFG2
R/W-0
 2003 Microchip Technology Inc.
V
RA3
RA3
V
V
V
REF
DD
DD
DD
x = Bit is unknown
PCFG1
R/W-0
PCFG0
R/W-0
AD
bit 0
is