PIC16F716-I/P Microchip Technology Inc., PIC16F716-I/P Datasheet - Page 48

• Manufacturer Part Number: PIC16F716-I/P
• Description: 18 PIN, 3.5 KB FLASH, 128 RAM, 13 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F716-I/P

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F716
REGISTER 7-2:
REGISTER 7-3:
DS41206A-page 46
bit 7
bit 6-0
bit 7
bit 6
bit 5
bit 4
bit 3-2
bit 1-0
PWM1CON: PWM CONFIGURATION REGISTER (ADDRESS: 18h)
ECCPAS – ENHANCED CCP AUTO SHUT DOWN REGISTER (ADDRESS: 19h)
bit 7
bit 7
PRSEN: PWM Restart Enable bit
1 = Upon auto-shutdown, the ECCPASE bit clears automatically once the shutdown event goes
0 = Upon auto-shutdown, ECCPASE must be cleared in firmware to restart the PWM.
PDC<6:0>: PWM Delay Count bits
Number of F
transition active, and the actual time it transitions active.
ECCPASE ECCPAS2
ECCPASE: ECCP Auto-Shutdown Event Status bit
1 = A shutdown event has occurred. Must be reset in firmware to re-enable ECCP if
0 = ECCP outputs enabled, no shutdown event
ECCPAS2: ECCP Auto-Shutdown bit 2
1 = RB0 (INT) pin low level (‘0’) causes shutdown
0 = RB0 (INT) pin has no effect on ECCP
Unimplemented: Read as ‘0’
ECCPAS0: ECCP Auto-Shutdown bit ‘0’
1 = RB4 pin low level (‘0’) causes shutdown
0 = RB4 pin has no effect on ECCP
PSSAC<1:0>: Pin P1A and P1C Shutdown State Control
00 = Drive Pins P1A and P1C to ‘0’
01 = Drive Pins P1A and P1C to ‘1’
1x = Pins P1A and P1C tri-state
PSSBD<1:0>: Pin P1B and P1D Shutdown State Control
00 = Drive Pins P1B and P1D to ‘0’
01 = Drive Pins P1B and P1D to ‘1’
1x = Pins P1B and P1D tri-state
Legend:
R = Readable bit
- n = Value at POR
Legend:
R = Readable bit
- n = Value at POR
PRSEN
R/W-0
R/W-0
away; the PWM restarts automatically.
PRSEN = 0
OSC
R/W-0
PDC6
R/W-0
/4 (4*T
OSC
R/W-0
PDC5
) cycles between the scheduled time when a PWM signal should
Preliminary
U-0
W = Writable bit
‘1’ = Bit is set
—
W = Writable bit
‘1’ = Bit is set
ECCPAS0 PSSAC1
R/W-0
R/W-0
PDC4
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
PDC3
PSSAC0
R/W-0
R/W-0
PDC2
 2003 Microchip Technology Inc.
x = Bit is unknown
PSSBD1
x = Bit is unknown
R/W-0
R/W-0
PDC1
PSSBD0
R/W-0
R/W-0
PDC0
bit 0
bit 0