PIC16F716-I/P Microchip Technology Inc., PIC16F716-I/P Datasheet - Page 34

• Manufacturer Part Number: PIC16F716-I/P
• Description: 18 PIN, 3.5 KB FLASH, 128 RAM, 13 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F716-I/P

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F716
6.1
Timer2 can be used as the PWM time base for PWM
mode of the ECCP module.
The TMR2 register is readable and writable, and is
cleared on any device Reset
The input clock (F
1:4
T2CKPS1:T2CKPS0 (T2CON<1:0>).
The match output of TMR2 goes through a 4-bit
postscaler (which gives a 1:1 to 1:16 scaling inclusive)
to generate a TMR2 interrupt (latched in flag bit
TMR2IF, (PIR1<1>).
The prescaler and postscaler counters are cleared
when any of the following occurs:
• A write to the TMR2 register
• A write to the T2CON register
• Any device Reset (Power-on Reset, MCLR Reset,
TMR2 is not cleared when T2CON is written.
TABLE 6-1:
DS41206A-page 32
Legend:
0Bh, 8Bh
Address
Watchdog Timer Reset, or Brown-out Reset)
0Ch
8Ch
12h
92h
11h
or
Timer2 Operation
INTCON
T2CON
Name
TMR2
PIR1
PIE1
x = unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used by the Timer2 module.
PR2
1:16,
REGISTERS ASSOCIATED WITH TIMER2 AS A TIMER/COUNTER
OSC
Bit 7
GIE
—
—
—
/4) has a prescale option of 1:1,
selected
TOUTPS3
PEIE
ADIF
ADIE
Bit 6
by
TOUTPS2
Bit 5
T0IE
—
—
control
TOUTPS1
Timer2 module’s register
Timer2 Period Register
Bit 4
INTE
—
—
Preliminary
bits
TOUTPS0
RBIE
Bit 3
—
—
6.2
The Timer2 module has an 8-bit Period register (PR2).
Timer2 increments from 00h until it matches PR2 and
then resets to 00h on the next increment cycle. PR2 is
a readable and writable register. The PR2 register is
initialized to FFh upon Reset.
FIGURE 6-1:
Sets flag
bit TMR2IF
TMR2ON
CCP1IF
CCP1IE
Bit 2
T0IF
1:1
Postscaler
Timer2 Interrupt
to
1:16
4
T2CKPS1 T2CKPS0
TMR2IF
TMR2IE
TMR2
output
Reset
INTF
Bit 1
EQ
Comparator
TIMER2 BLOCK DIAGRAM
TMR2 reg
TMR1IF
TMR1IE
PR2 reg
 2003 Microchip Technology Inc.
Bit 0
RBIF
0000 000x
0000 0000
-000 0000
1111 1111
Value on
-0-- -000
-0-- -000
POR,
BOR
1:1, 1:4, 1:16
Prescaler
2
0000 000u
0000 0000
-000 0000
1111 1111
Value on
-0-- -000
-0-- -000
all other
Resets
F
OSC
/4