PIC16F716-I/P Microchip Technology Inc., PIC16F716-I/P Datasheet - Page 39

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PIC16F716-I/P

Manufacturer Part Number
PIC16F716-I/P
Description
18 PIN, 3.5 KB FLASH, 128 RAM, 13 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F716-I/P

A/d Inputs
4-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
13
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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7.3.2
The PWM duty cycle is specified by writing to the
CCPR1L register and to the CCP1CON<5:4> bits. Up
to 10-bit resolution is available. The CCPR1L contains
the eight MSbs and the CCP1CON<5:4> contains the
two LSbs. This 10-bit value is represented by
CCPR1L:CCP1CON<5:4>. The following equation is
used to calculate the PWM duty cycle in time:
EQUATION 7-2:
CCPR1L and CCP1CON<5:4> can be written to at any
time, but the duty cycle value is not latched into
CCPR1H until a match between PR2 and TMR2 occurs
(i.e., the period is complete). In PWM mode, CCPR1H
is a read-only register.
The CCPR1H register and a 2-bit internal latch are
used to double buffer the PWM duty cycle. This double
buffering is essential for glitchless PWM operation.
When the CCPR1H and 2-bit latch match TMR2
concatenated with an internal 2-bit Q clock or 2 bits of
the TMR2 prescaler, the CCP1 pin is cleared.
Maximum PWM resolution (bits) for a given PWM
frequency is given by the following equation:
TABLE 7-3:
TABLE 7-4:
 2003 Microchip Technology Inc.
0Bh,8Bh INTCON
0Ch
11h
12h
15h
16h
17h
86h
8Ch
92h
Legend:
Timer Prescaler (1, 4, 16)
PR2 Value
Maximum Resolution (bits)
Address
PWM Duty Cycle = (CCPR1L:CCP1CON<5:4> •
PIR1
TMR2
T2CON
CCPR1L
CCPR1H
CCP1CON
TRISB
PIE1
PR2
Name
PWM DUTY CYCLE
x = unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used by PWM and Timer2.
PWM Frequency
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 20 MHz
REGISTERS ASSOCIATED WITH PWM AND TIMER2
Timer2 module’s register
Capture/Compare/PWM register1 (LSB)
Capture/Compare/PWM register1 (MSB)
PORB Data direction register
Timer2 module’s period register
P1M1
Bit 7
GIE
T
OSC
TOUTPS3 TOUTPS2 TOUTPS1 TOUTPS0 TMR2ON T2CKPS1 T2CKPS0
• (TMR2 prescale value)
P1M0
PEIE
ADIF
ADIE
Bit 6
DC1B1
Bit 5
T0IE
1.22 kHz 4.88 kHz 19.53 kHz 78.12 kHz 156.3 kHz 208.3 kHz
DC1B0
0xFF
Bit 4
INTE
16
10
Preliminary
CCP1M3
RBIE
Bit 3
0xFF
10
4
EQUATION 7-3:
For an example PWM period and duty cycle
calculation, see the PICmicro
Manual, (DS33023).
7.3.3
The following steps should be taken when configuring
the ECCP module for PWM operation:
1.
2.
3.
4.
5.
Note:
CCP1M2
CCP1IF
CCP1IE
Set the PWM period by writing to the PR2
register.
Set the PWM duty cycle by writing to the
CCPR1L register and CCP1CON<5:4> bits.
Make the CCP1 pin an output by clearing the
TRISB<3> bit.
Set the TMR2 prescale value and enable Timer2
by writing to T2CON.
Configure the CCP1 module for PWM operation.
Bit 2
T0IF
0xFF
Max resolution
10
1
If the PWM duty cycle value is longer than
the PWM period the CCP1 pin will not be
cleared.
SET-UP FOR PWM OPERATION
CCP1M1
TMR2IF
TMR2IE
INTF
Bit 1
0x3F
CCP1M0
1
8
TMR1IE
TMR1IF
RBIF
Bit 0
=
PIC16F716
®
log
0000 000x
-0-- -000
0000 0000
-000 0000
xxxx xxxx
xxxx xxxx
0000 0000
1111 1111
-0-- -000
1111 1111
Mid-Range Reference
log(2)
Value on
0x1F
POR,
(
BOR
1
7
F
F
DS41206A-page 37
PWM
OSC
)
0000 000u
-0-- -000
0000 0000
-000 0000
uuuu uuuu
uuuu uuuu
0000 0000
1111 1111
-0-- -000
1111 1111
Value on
all other
Resets
bits
0x17
6.6
1

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