PIC16F716-I/P Microchip Technology Inc., PIC16F716-I/P Datasheet - Page 38

• Manufacturer Part Number: PIC16F716-I/P
• Description: 18 PIN, 3.5 KB FLASH, 128 RAM, 13 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F716-I/P

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC16F716
7.3
In Pulse Width Modulation (PWM) mode, the CCP1 pin
produces up to a 10-bit resolution PWM output. Since
the CCP1 pin is multiplexed with the PORTB data latch,
the TRISB<3> bit must be cleared to make the CCP1
pin an output.
Figure 7-3 shows a simplified block diagram of the
CCP module in PWM mode.
For a step-by-step procedure on how to setup the
ECCP module for PWM operation, see Section 7.3.3
“Set-Up for PWM Operation”.
FIGURE 7-3:
DS41206A-page 36
Note
Note:
CCPR1H (Slave)
CCPR1L
Comparator
Duty cycle registers
PR2
1:
TMR2
Comparator
PWM Mode
8-bit timer is concatenated with 2-bit internal Q clock
or 2 bits of the prescaler to create 10-bit time base.
Clearing the CCP1CON register will force
the CCP1 PWM output latch to the default
low level. This is not the PORTB I/O data
latch.
(Note 1)
Clear Timer,
CCP1 pin and
latch D.C.
SIMPLIFIED PWM BLOCK
DIAGRAM
CCP1CON<5:4>
R
S
Q
TRISB<3>
RB3/CCP1/P1A
Preliminary
A PWM output (Figure 7-4) has a time base (period)
and a time that the output stays high (duty cycle). The
frequency of the PWM is the inverse of the period
(1/period).
FIGURE 7-4:
7.3.1
The PWM period is specified by writing to the PR2
register. The PWM period can be calculated using the
following formula:
EQUATION 7-1:
PWM frequency is defined as 1/[PWM period].
When TMR2 is equal to PR2, the following three events
occur on the next increment cycle:
• TMR2 is cleared
• The CCP1 pin is set (exception: if PWM duty
• The PWM duty cycle is latched from CCPR1L into
cycle = 0%, the CCP1 pin will not be set)
CCPR1H
Note:
TMR2 = PR2
PWM Period = [(PR2) + 1] • 4 • Tosc •
Duty Cycle
Period = PR2+1
PWM PERIOD
The Timer2 postscaler (see Section 6.0
“Timer2 Module”) is not used in the
determination of the PWM frequency. The
postscaler could be used to have a servo
update rate at a different frequency than
the PWM output.
TMR2 = Duty Cycle (CCPR1H)
(TMR2 prescale value)
PWM OUTPUT
 2003 Microchip Technology Inc.
TMR2 = PR2