PIC16F716-I/P Microchip Technology Inc., PIC16F716-I/P Datasheet - Page 55

• Manufacturer Part Number: PIC16F716-I/P
• Description: 18 PIN, 3.5 KB FLASH, 128 RAM, 13 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC16F716-I/P

• A/d Inputs: 4-Channel, 8-Bit
• Cpu Speed: 5 MIPS
• Eeprom Memory: 0 Bytes
• Input Output: 13
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 18-pin PDIP
• Programmable Memory: 3.5K Bytes
• Ram Size: 128 Bytes
• Speed: 20 MHz
• Timers: 2-8-bit, 1-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

8.4
8.5
An A/D conversion can be started by the “special event
trigger” of the ECCP module. This requires that the
CCP1M3:CCP1M0
programmed as ‘1011’ and that the A/D module is
enabled (ADON bit is set). When the trigger occurs, the
GO/DONE bit will be set, starting the A/D conversion,
and the Timer1 counter will be reset to zero. Timer1 is
reset to automatically repeat the A/D acquisition period
with minimal software overhead (moving the ADRES to
the desired location). The appropriate analog input
channel must be selected and the minimum acquisition
done before the “special event trigger” sets the GO/
DONE bit (starts a conversion).
If the A/D module is not enabled (ADON is cleared),
then the “special event trigger” will be ignored by the
A/D module, but will still reset the Timer1 counter.
TABLE 8-2:
 2003 Microchip Technology Inc.
05h
0Bh,8Bh
0Ch
1Eh
1Fh
85h
8Ch
9Fh
Legend:
Note
Address
Note:
1:
A/D Conversions
Use of the ECCP Trigger
PORTA
INTCON
PIR1
ADRES
ADCON0
TRISA
PIE1
ADCON1
Name
x = unknown, u = unchanged, - = unimplemented read as ‘0’. Shaded cells are not used for A/D conversion.
Reserved bit, do not use.
The GO/DONE bit should NOT be set in
the same instruction that turns on the A/D.
SUMMARY OF A/D REGISTERS
A/D Result Register
ADCS1
Bit 7
GIE
—
—
—
—
bits
—
ADCS0
(CCP1CON<3:0>)
PEIE
ADIF
ADIE
Bit 6
—
—
—
CHS2
Bit 5
T0IE
—
—
—
—
—
(1)
(1)
CHS1
INTE
Bit 4
RA4
—
—
—
Preliminary
be
CHS0
RBIE
Bit 3
RA3
PORTA Data Direction Register
—
—
—
GO/DONE
CCP1IF
CCP1IE
PCFG2
Bit 2
RA2
T0IF
TMR2IF
TMR2IE
PCFG1
INTF
Bit 1
RA1
—
(1)
TMR1IF
TMR1IE
PCFG0
ADON
RBIF
Bit 0
RA0
PIC16F716
--xx 0000
0000 000x
-0-- -000
xxxx xxxx
0000 0000
--11 1111
-0-- -000
---- -000
Value on
POR,
BOR
DS41206A-page 53
other Resets
Value on all
--uu uuuu
0000 000u
-0-- -000
uuuu uuuu
0000 0000
--11 1111
-0-- 0000
---- -000