PIC16F716-I/P Microchip Technology Inc., PIC16F716-I/P Datasheet - Page 64

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PIC16F716-I/P

Manufacturer Part Number
PIC16F716-I/P
Description
18 PIN, 3.5 KB FLASH, 128 RAM, 13 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC16F716-I/P

A/d Inputs
4-Channel, 8-Bit
Cpu Speed
5 MIPS
Eeprom Memory
0 Bytes
Input Output
13
Memory Type
Flash
Number Of Bits
8
Package Type
18-pin PDIP
Programmable Memory
3.5K Bytes
Ram Size
128 Bytes
Speed
20 MHz
Timers
2-8-bit, 1-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC16F716
9.8
On power-up, the time-out sequence is as follows: First
PWRT time-out is invoked after the POR time delay has
expired. Then OST is activated. The total time-out will
vary based on oscillator configuration and the status of
the PWRT. For example, in RC mode with the PWRT
disabled, there will be no time-out at all. Figure 9-10,
Figure 9-11,
sequences on power-up.
Since the time-outs occur from the POR pulse, if MCLR
is kept low long enough, the time-outs will expire. Then
bringing MCLR high will begin execution immediately
(Figure 9-12). This is useful for testing purposes or to
synchronize more than one PIC16F716 device
operating in parallel.
Table 9-5 shows the Reset conditions for some special
function registers, while Table 9-6 shows the Reset
conditions for all the registers.
TABLE 9-3:
TABLE 9-4:
DS41206A-page 62
XT, HS, LP
RC
POR
0
0
0
0
1
1
1
1
1
Oscillator Configuration
Time-out Sequence
BOR
x
1
x
x
0
1
1
1
1
and
TIME-OUT IN VARIOUS SITUATIONS
STATUS BITS AND THEIR SIGNIFICANCE
TO
1
1
0
x
1
0
0
u
1
Figure 9-12
PD
1
1
x
0
1
1
0
u
0
Power-on Reset (BOREN = 0)
Power-on Reset (BOREN = 1)
Illegal, TO is set on POR
Illegal, PD is set on POR
Brown-out Reset
WDT Reset
WDT Wake-up
MCLR Reset during normal operation
MCLR Reset during Sleep or interrupt wake-up from Sleep
depict
72 ms + 1024 T
PWRTE = 0
time-out
72 ms
Power-up or Brown-out
Preliminary
OSC
9.9
The Power Control/Status Register, PCON has two
bits.
Bit 0 is the Brown-out Reset Status bit, BOR. If the
BOREN configuration bit is set, BOR is ‘1’ on Power-on
Reset and reset to ‘0’ when a Brown-out condition
occurs. BOR must then be set by the user and checked
on subsequent resets to see if it is clear, indicating that
another Brown-out has occurred.
If the BOREN configuration bit is clear, BOR is
unknown on Power-on Reset.
Bit 1 is POR (Power-on Reset Status bit). It is cleared
on a Power-on Reset and unaffected otherwise. The
user must set this bit following a Power-on Reset.
PWRTE = 1
1024 T
Power Control/Status Register
(PCON)
OSC
 2003 Microchip Technology Inc.
Wake-up from Sleep
1024 T
OSC

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