PIC18F6621-I/PT Microchip Technology Inc., PIC18F6621-I/PT Datasheet - Page 149

• Manufacturer Part Number: PIC18F6621-I/PT
• Description: 64 PIN, 64 KB FLASH, 3840 RAM, 52 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F6621-I/PT

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 54
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 64-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 3.8K Bytes
• Speed: 40 MHz
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

15.0
The Timer4 module timer has the following features:
• 8-bit timer (TMR4 register)
• 8-bit period register (PR4)
• Readable and writable (both registers)
• Software programmable prescaler (1:1, 1:4, 1:16)
• Software programmable postscaler (1:1 to 1:16)
• Interrupt on TMR4 match of PR4
Timer4 has a control register shown in Register 15-1.
Timer4 can be shut off by clearing control bit, TMR4ON
(T4CON<2>), to minimize power consumption. The
prescaler and postscaler selection of Timer4 are also
controlled by this register. Figure 15-1 is a simplified
block diagram of the Timer4 module.
REGISTER 15-1:
 2005 Microchip Technology Inc.
TIMER4 MODULE
bit 7
bit 6-3
bit 2
bit 1-0
bit 7
Unimplemented: Read as ‘0’
T4OUTPS3:T4OUTPS0: Timer4 Output Postscale Select bits
0000 = 1:1 Postscale
0001 = 1:2 Postscale
•
•
•
1111 = 1:16 Postscale
TMR4ON: Timer4 On bit
1 = Timer4 is on
0 = Timer4 is off
T4CKPS1:T4CKPS0: Timer4 Clock Prescale Select bits
00 = Prescaler is 1
01 = Prescaler is 4
1x = Prescaler is 16
T4CON: TIMER4 CONTROL REGISTER
Legend:
R = Readable bit
-n = Value at POR
U-0
—
T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0
R/W-0
PIC18F6525/6621/8525/8621
R/W-0
W = Writable bit
‘1’ = Bit is set
R/W-0
15.1
Timer4 can be used as the PWM time base for the
PWM mode of the CCP module. The TMR4 register is
readable and writable and is cleared on any device
Reset. The input clock (F
of 1:1, 1:4 or 1:16, selected by control bits
T4CKPS1:T4CKPS0
output of TMR4 goes through a 4-bit postscaler (which
gives a 1:1 to 1:16 scaling inclusive) to generate a
TMR4 interrupt, latched in flag bit TMR4IF (PIR3<3>).
The prescaler and postscaler counters are cleared
when any of the following occurs:
• a write to the TMR4 register
• a write to the T4CON register
• any device Reset (Power-on Reset, MCLR Reset,
TMR4 is not cleared when T4CON is written.
Watchdog Timer Reset, or Brown-out Reset)
Timer4 Operation
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
(T4CON<1:0>).
OSC
/4) has a prescale option
x = Bit is unknown
R/W-0
DS39612B-page 147
The
R/W-0
match
bit 0