PIC18F6621-I/PT Microchip Technology Inc., PIC18F6621-I/PT Datasheet - Page 20

• Manufacturer Part Number: PIC18F6621-I/PT
• Description: 64 PIN, 64 KB FLASH, 3840 RAM, 52 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F6621-I/PT

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 54
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 64-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 3.8K Bytes
• Speed: 40 MHz
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F6525/6621/8525/8621
TABLE 1-2:
DS39612B-page 18
RG0/ECCP3/P3A
RG1/TX2/CK2
RG2/RX2/DT2
RG3/CCP4/P3D
RG4/CCP5/P1D
RG5
Legend: TTL = TTL compatible input
Note 1: Alternate assignment for ECCP2/P2A in PIC18F8525/8621 devices when CCP2MX (CONFIG3H<0>) is not set (all
RG0
ECCP3
P3A
RG1
TX2
CK2
RG2
RX2
DT2
RG3
CCP4
P3D
RG4
CCP5
P1D
2: Default assignment for ECCP2/P2A when CCP2MX is set (all devices).
3: External memory interface functions are only available on PIC18F8525/8621 devices.
4: Default assignment for P1B/P1C/P3B/P3C for PIC18F8525/8621 devices when ECCPMX (CONFIG3H<1>) is set and for
5: Alternate assignment for ECCP2/P2A in PIC18F8525/8621 devices when CCP2MX is not set (Microcontroller mode).
6: PORTH and PORTJ (and their multiplexed functions) are only available on PIC18F8525/8621 devices.
7: Alternate assignment for P1B/P1C/P3B/P3C for PIC18F8525/8621 devices when ECCPMX (CONFIG3H<1>) is not set.
8: AV
9: RG5 is multiplexed with MCLR and is only available when the MCLR Resets are disabled.
Pin Name
ST = Schmitt Trigger input with CMOS levels
I
P
Program Memory modes except Microcontroller).
all PIC18F6525/6621 devices.
the part in user or ICSP™ modes. See parameter D001 for details.
DD
= Input
= Power
must be connected to a positive supply and AV
PIC18F6525/6621/8525/8621 PINOUT I/O DESCRIPTIONS (CONTINUED)
PIC18F6X2X
3
4
5
6
8
7
Pin Number
PIC18F8X2X
10
5
6
7
8
9
SS
Type
Pin
CMOS = CMOS compatible input or output
Analog = Analog input
O
OD
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
—
must be connected to a ground reference for proper operation of
O
O
O
O
I
Buffer
= Output
= Open-Drain (no P diode to V
Type
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
—
—
—
—
—
PORTG is a bidirectional I/O port.
See MCLR/V
Digital I/O.
Enhanced Capture 3 input, Compare 3
output, PWM 3 output.
ECCP3 output P3A.
Digital I/O.
USART2 asynchronous transmit.
USART2 synchronous clock
(see RX2/DT2).
Digital I/O.
USART2 asynchronous receive.
USART2 synchronous data
(see TX2/CK2).
Digital I/O.
Capture 4 input, Compare 4 output,
PWM 4 output.
ECCP3 output P3D.
Digital I/O.
Capture 5 input, Compare 5 output,
PWM 5 output.
ECCP1 output P1D.
 2005 Microchip Technology Inc.
PP
/RG5 pin.
Description
DD
)