PIC18F6621-I/PT Microchip Technology Inc., PIC18F6621-I/PT Datasheet - Page 264

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PIC18F6621-I/PT

Manufacturer Part Number
PIC18F6621-I/PT
Description
64 PIN, 64 KB FLASH, 3840 RAM, 52 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F6621-I/PT

A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
54
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
64-pin TQFP
Programmable Memory
64K Bytes
Ram Size
3.8K Bytes
Speed
40 MHz
Timers
2-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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PIC18F6525/6621/8525/8621
REGISTER 24-4:
REGISTER 24-5:
DS39612B-page 262
bit 7
bit 6-2
bit 1
bit 0
bit 7
bit 6-2
bit 1-0
bit 7
MCLRE: MCLR Enable bit
1 = MCLR pin enabled, RG5 input pin disabled
0 = RG5 input enabled, MCLR disabled
Unimplemented: Read as ‘0’
ECCPMX: ECCP Mux bit
1 = ECCP1 (P1B/P1C) and ECCP3 (P3B/P3C) PWM outputs are multiplexed with RE6 through
0 = ECCP1 (P1B/P1C) and ECCP3 (P3B/P3C) PWM outputs are multiplexed with RH7 through
CCP2MX: ECCP2 Mux bit
In Microcontroller mode:
1 = ECCP2 input/output is multiplexed with RC1
0 = ECCP2 input/output is multiplexed with RE7
In Microprocessor, Microprocessor with Boot Block and Extended Microcontroller modes
(PIC18F8525/8621 devices only):
1 = ECCP2 input/output is multiplexed with RC1
0 = ECCP2 input/output is multiplexed with RB3
bit 7
WAIT: External Bus Data Wait Enable bit
1 = Wait selections unavailable for table reads and table writes
0 = Wait selections for table reads and table writes are determined by WAIT1:WAIT0 bits
Unimplemented: Read as ‘0’
PM1:PM0: Processor Mode Select bits
11 = Microcontroller mode
10 = Microprocessor mode
01 = Microprocessor with Boot Block mode
00 = Extended Microcontroller mode
CONFIG3L: CONFIGURATION REGISTER 3 LOW (BYTE ADDRESS 300004h)
CONFIG3H: CONFIGURATION REGISTER 3 HIGH (BYTE ADDRESS 300005h)
MCLRE
Legend:
R = Readable bit
-n = Value when device is unprogrammed
Legend:
R = Readable bit
-n = Value when device is unprogrammed
Note 1: If MCLR is disabled, either disable Low-Voltage ICSP or hold RB5/KBI1/PGM low to
Note 1: This register is unimplemented for PIC18F6525/6621 devices; maintain these bits set.
R/P-1
R/P-1
WAIT
RE3
RH4
(MEMCOM<5:4>)
2: This register is unimplemented for PIC18F6525/6621 devices; maintain these bits
(1)
ensure proper entry into ICSP mode.
set.
U-0
U-0
(2)
P = Programmable bit
P = Programmable bit
(1)
U-0
U-0
U-0
U-0
U-0
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U = Unimplemented bit, read as ‘0’
u = Unchanged from programmed state
U-0
U-0
U-0
 2005 Microchip Technology Inc.
ECCPMX
R/P-1
R/P-1
PM1
(2)
CCP2MX
R/P-1
R/P-1
PM0
(1)
bit 0
bit 0

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