PIC18F6621-I/PT Microchip Technology Inc., PIC18F6621-I/PT Datasheet - Page 276

• Manufacturer Part Number: PIC18F6621-I/PT
• Description: 64 PIN, 64 KB FLASH, 3840 RAM, 52 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F6621-I/PT

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 54
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 64-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 3.8K Bytes
• Speed: 40 MHz
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

PIC18F6525/6621/8525/8621
24.5
Eight memory locations (200000h-200007h) are desig-
nated as ID locations where the user can store check-
sum or other code identification numbers. These
locations are accessible during normal execution
through the TBLRD and TBLWT instructions, or during
program/verify. The ID locations can be read when the
device is code-protected.
24.6
PIC18F6525/6621/8525/8621 microcontrollers can be
serially programmed while in the end application circuit.
This is simply done with two lines for clock and data
and three other lines for power, ground and the
programming voltage. This allows customers to
manufacture boards with unprogrammed devices and
then program the microcontroller just before shipping
the product. This also allows the most recent firmware
or a custom firmware to be programmed.
24.7
When the DEBUG bit in Configuration register,
CONFIG4L, is programmed to a ‘0’, the in-circuit
debugger functionality is enabled. This function allows
simple debugging functions when used with MPLAB
IDE. When the microcontroller has this feature
enabled, some of the resources are not available for
general use. Table 24-4 shows which features are
consumed by the background debugger.
TABLE 24-4:
To use the in-circuit debugger function of the micro-
controller, the design must implement In-Circuit Serial
Programming connections to MCLR/V
RB7 and RB6. This will interface to the in-circuit debug-
ger module available from Microchip or one of the third
party development tool companies.
DS39612B-page 274
Stack
Program Memory
Data Memory
I/O pins
ID Locations
(ICSP™)
In-Circuit Debugger
In-Circuit Serial Programming™
DEBUGGER RESOURCES
RB6, RB7
512 bytes
10 bytes
2 levels
PP
, V
DD
, GND,
®
24.8
The LVP bit in Configuration register, CONFIG4L,
enables Low-Voltage ICSP programming. This mode
allows the microcontroller to be programmed via ICSP
using a V
only means that V
V
voltage. In this mode, the RB5/KBI1/PGM pin is dedi-
cated to the programming function and ceases to be a
general purpose I/O pin. During programming, V
applied to the MCLR/V
mode, V
provided the LVP bit is set. The LVP bit defaults to a ‘1’
from the factory.
If Low-Voltage Programming mode is not used, the LVP
bit can be programmed to a ‘0’ and RB5/KBI1/PGM
becomes a digital I/O pin. However, the LVP bit may
only be programmed when programming is entered
with V
It should be noted that once the LVP bit is programmed
to ‘0’, only the High-Voltage Programming mode is
available and only High-Voltage Programming mode
can be used to program the device.
When using Low-Voltage ICSP, the part must be
supplied 4.5V to 5.5V if a bulk erase will be executed.
This includes reprogramming of the code-protect bits
from an on-state to off-state. For all other cases of Low-
Voltage ICSP, the part may be programmed at the
normal operating voltage. This means unique user IDs
or user code can be reprogrammed or added.
IHH
Note 1: The High-Voltage Programming mode is
, but can instead be left at the normal operating
IHH
DD
2: While in Low-Voltage ICSP mode, the
3: When using Low-Voltage ICSP Program-
4: If the device Master Clear is disabled,
Low-Voltage ICSP Programming
DD
on MCLR/V
must be applied to the RB5/KBI1/PGM pin
source in the operating voltage range. This
always available, regardless of the state
of the LVP bit, by applying V
MCLR pin.
RB5 pin can no longer be used as a
general purpose I/O pin and should be
held low during normal operation.
ming (LVP) and the pull-ups on PORTB
are enabled, bit 5 in the TRISB register
must be cleared to disable the pull-up on
RB5 and ensure the proper operation of
the device.
verify that either of the following is done to
ensure proper entry into ICSP mode:
a.) disable Low-Voltage Programming
b.) make certain that RB5/KBI1/PGM is
held low during entry into ICSP.
(CONFIG4L<2> = 0); or
PP
PP
does not have to be brought to
PP
 2005 Microchip Technology Inc.
.
pin. To enter Programming
IHH
to the
DD
is