PIC18F6621-I/PT Microchip Technology Inc., PIC18F6621-I/PT Datasheet - Page 275

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PIC18F6621-I/PT

Manufacturer Part Number
PIC18F6621-I/PT
Description
64 PIN, 64 KB FLASH, 3840 RAM, 52 I/O
Manufacturer
Microchip Technology Inc.
Datasheet

Specifications of PIC18F6621-I/PT

A/d Inputs
12-Channel, 10-Bit
Comparators
2
Cpu Speed
10 MIPS
Eeprom Memory
1024 Bytes
Input Output
54
Interface
I2C/SPI/UART/USART
Memory Type
Flash
Number Of Bits
8
Package Type
64-pin TQFP
Programmable Memory
64K Bytes
Ram Size
3.8K Bytes
Speed
40 MHz
Timers
2-8-bit, 3-16-bit
Voltage, Range
2-5.5 V
Lead Free Status / Rohs Status
RoHS Compliant part Electrostatic Device

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FIGURE 24-6:
24.4.2
The entire data EEPROM is protected from external
reads and writes by two bits: CPD and WRTD. CPD
inhibits external reads and writes of data EEPROM.
WRTD inhibits external writes to data EEPROM. The
CPU can continue to read data EEPROM regardless of
the protection bit settings.
 2005 Microchip Technology Inc.
Results: Table reads permitted within Block n, even when EBTRBn = 0.
Register Values
TBLPTR = 000FFFh
DATA EEPROM CODE
PROTECTION
PC = 003FFEh
TABLAT register returns the value of the data at the location TBLPTR.
EXTERNAL BLOCK TABLE READ (EBTRn) ALLOWED
PIC18F6525/6621/8525/8621
Program Memory
TBLRD*
24.4.3
The Configuration registers can be write-protected.
The WRTC bit controls protection of the Configuration
registers. In user mode, the WRTC bit is readable only.
WRTC can only be written via ICSP or an external
programmer.
000000h
0007FFh
00BFFFh
00C000h
00FFFFh
000800h
003FFFh
004000h
007FFFh
008000h
CONFIGURATION REGISTER
PROTECTION
Configuration Bit Settings
WRTB,EBTRB = 11
WRT0,EBTR0 = 10
WRT1,EBTR1 = 11
WRT2,EBTR2 = 11
WRT3,EBTR3 = 11
DS39612B-page 273

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