PIC18F6621-I/PT Microchip Technology Inc., PIC18F6621-I/PT Datasheet - Page 239

• Manufacturer Part Number: PIC18F6621-I/PT
• Description: 64 PIN, 64 KB FLASH, 3840 RAM, 52 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F6621-I/PT

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 54
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 64-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 3.8K Bytes
• Speed: 40 MHz
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

The value in the ADRESH/ADRESL registers is
not modified for a Power-on Reset. The ADRESH/
ADRESL registers will contain unknown data after a
Power-on Reset.
After the A/D module has been configured as desired,
the selected channel must be acquired before the
conversion is started. The analog input channels must
have their corresponding TRIS bits selected as an
input. To determine acquisition time, see Section 20.1
“A/D Acquisition Requirements”. After this acquisi-
tion time has elapsed, the A/D conversion can be
started.
The following steps should be followed to do an A/D
conversion:
1.
FIGURE 20-2:
 2005 Microchip Technology Inc.
Configure the A/D module:
• Configure analog pins, voltage reference and
• Select A/D input channel (ADCON0)
• Select A/D conversion clock (ADCON2)
• Turn on A/D module (ADCON0)
digital I/O (ADCON1)
Legend:
V
AIN
Rs
C
V
I
R
SS
C
R
LEAKAGE
ANALOG INPUT MODEL
ANx
T
PIN
IC
HOLD
SS
C
5 pF
PIN
= input capacitance
= threshold voltage
= leakage current at the pin due to
= interconnect resistance
= sampling switch
= sample/hold capacitance (from DAC)
= sampling switch resistance
various junctions
V
DD
PIC18F6525/6621/8525/8621
V
V
T
T
= 0.6V
= 0.6V
I
± 500 nA
LEAKAGE
2.
3.
4.
5.
6.
7.
R
IC
Configure A/D interrupt (if desired):
• Clear ADIF bit
• Set ADIE bit
• Set GIE bit
Wait the required acquisition time (not required
in case of auto-acquisition time).
Start conversion:
• Set GO/DONE bit (ADCON0 register)
Wait for A/D conversion to complete, by either:
• Polling for the GO/DONE bit to be cleared
OR
• Waiting for the A/D interrupt
Read A/D Result registers (ADRESH:ADRESL);
clear bit ADIF, if required.
For next conversion, go to step 1 or step 2, as
required. The A/D conversion time per bit is
defined as T
required before the next acquisition starts.
≤ 1k
V
DD
SS
Sampling
Switch
6V
5V
4V
3V
2V
AD
R
SS
. A minimum wait of 2 T
Sampling Switch
5 6 7 8 9 10 11
V
SS
C
HOLD
= 120 pF
DS39612B-page 237
(kΩ)
AD
is