PIC18F6621-I/PT Microchip Technology Inc., PIC18F6621-I/PT Datasheet - Page 77

• Manufacturer Part Number: PIC18F6621-I/PT
• Description: 64 PIN, 64 KB FLASH, 3840 RAM, 52 I/O
• Manufacturer: Microchip Technology Inc.

Specifications of PIC18F6621-I/PT

• A/d Inputs: 12-Channel, 10-Bit
• Comparators: 2
• Cpu Speed: 10 MIPS
• Eeprom Memory: 1024 Bytes
• Input Output: 54
• Interface: I2C/SPI/UART/USART
• Memory Type: Flash
• Number Of Bits: 8
• Package Type: 64-pin TQFP
• Programmable Memory: 64K Bytes
• Ram Size: 3.8K Bytes
• Speed: 40 MHz
• Timers: 2-8-bit, 3-16-bit
• Voltage, Range: 2-5.5 V
• Lead Free Status / Rohs Status: RoHS Compliant part Electrostatic Device

6.2.3
Figure 6-3 shows an example of 16-bit Byte Select
mode for PIC18F8525/8621 devices. This mode allows
table write operations to word-wide external memories
with byte selection capability. This generally includes
both word-wide Flash and SRAM devices.
During a TBLWT cycle, the TABLAT data is presented
on the upper and lower byte of the AD15:AD0 bus. The
WRH signal is strobed for each write cycle; the WRL
pin is not used. The BA0 or UB/LB signals are used to
select the byte to be written based on the Least
Significant bit of the TBLPTR register.
FIGURE 6-3:
 2005 Microchip Technology Inc.
Note 1: This signal only applies to table writes. See Section 5.1 “Table Reads and Table Writes”.
PIC18F8X2X
2: Demultiplexing is only required when multiple memory devices are accessed.
16-BIT BYTE SELECT MODE
AD<15:8>
A<19:16>
AD<7:0>
WRH
WRL
ALE
BA0
OE
UB
I/O
LB
16-BIT BYTE SELECT MODE EXAMPLE
PIC18F6525/6621/8525/8621
373
373
A<20:1>
A<20:1>
138
Flash and SRAM devices use different control signal
combinations to implement Byte Select mode. JEDEC
standard Flash memories require that a controller I/O
port pin be connected to the memory’s BYTE/WORD
pin to provide the select signal. They also use the BA0
signal from the controller as a byte address. JEDEC
standard static RAM memories, on the other hand, use
the UB or LB signals to select the byte.
(2)
A<x:1>
A<x:1>
CE
UB
A0
CE
BYTE/WORD
LB
OE
SRAM Memory
Flash Memory
Address Bus
Data Bus
Control Lines
WR
JEDEC Word
JEDEC Word
OE WR
(1)
D<15:0>
D<15:0>
DS39612B-page 75
(1)
D<15:0>
D<15:0>