ispPAC-POWR1014-01T48I Lattice, ispPAC-POWR1014-01T48I Datasheet - Page 31

• Manufacturer Part Number: ispPAC-POWR1014-01T48I
• Description: Supervisory Circuits Prec. Prog. Pwr Sppl y Seq. Mon. Trim I
• Manufacturer: Lattice
• Series: ispPAC®r

Specifications of ispPAC-POWR1014-01T48I

• Number Of Voltages Monitored: 10
• Output Type: Open Collector / Drain
• Manual Reset: Not Resettable
• Watchdog: No Watchdog
• Power-up Reset Delay (typ): 500 ms
• Supply Voltage (max): 3.96 V
• Supply Voltage (min): 2.8 V
• Supply Current (typ): 20 mA
• Mounting Style: SMD/SMT
• Package / Case: TQFP-48
• Applications: General Purpose
• Voltage - Input: -0.3 V ~ 5.9 V
• Voltage - Supply: 2.8 V ~ 3.96 V
• Current - Supply: 20mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
Figure 2-22. I
The I
issuing a write of any value to the I
is equivalent to toggling the Resetb pin of the chip. Refer to the Resetb Signal, RESET Command via JTAG or I
section of this data sheet for further information.
Figure 2-23. I
2
C interface also provides the ability to initiate reset operations. The ispPAC-POWR1014A may be reset by
2
2
C Register Mapping for UES Bits
C Reset Register
0x12 - RESET (Write Only)
0x0A - UES_BYTE0 (Read Only)
0x0B - UES_BYTE1 (Read Only)
0x0C - UES_BYTE2 (Read Only)
0x0D - UES_BYTE3 (Read Only)
UES15
UES23
UES31
UES7
b7
b7
b7
b7
b7
X
UES14
UES22
UES30
UES6
b6
b6
b6
b6
b6
X
2
C RESET register (Figure 2-23). Note: The execution of the I
UES13
UES21
UES29
UES5
b5
b5
b5
b5
b5
X
UES12
UES20
UES28
UES4
b4
b4
b4
b4
b4
X
2-31
UES11
UES19
UES27
UES3
b3
b3
b3
b3
b3
X
UES10
UES18
UES26
UES2
b2
b2
b2
b2
b2
X
ispPAC-POWR1014/A Data Sheet
UES17
UES25
UES1
UES9
b1
b1
b1
b1
b1
X
UES16
UES24
UES0
UES8
b0
b0
b0
b0
b0
X
2
C reset command
2
C