ispPAC-POWR1014-01T48I Lattice, ispPAC-POWR1014-01T48I Datasheet - Page 34

• Manufacturer Part Number: ispPAC-POWR1014-01T48I
• Description: Supervisory Circuits Prec. Prog. Pwr Sppl y Seq. Mon. Trim I
• Manufacturer: Lattice
• Series: ispPAC®r

Specifications of ispPAC-POWR1014-01T48I

• Number Of Voltages Monitored: 10
• Output Type: Open Collector / Drain
• Manual Reset: Not Resettable
• Watchdog: No Watchdog
• Power-up Reset Delay (typ): 500 ms
• Supply Voltage (max): 3.96 V
• Supply Voltage (min): 2.8 V
• Supply Current (typ): 20 mA
• Mounting Style: SMD/SMT
• Package / Case: TQFP-48
• Applications: General Purpose
• Voltage - Input: -0.3 V ~ 5.9 V
• Voltage - Supply: 2.8 V ~ 3.96 V
• Current - Supply: 20mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Lattice Semiconductor
Three special purpose pins, VCCPROG, ATDI and TDISEL, enable programming of the un-programmed ispPAC-
POWR1014/A under such circumstances. The VCCPROG pin provides power to the programming circuitry of the
ispPAC-POWR1014/A device (when VCCD and VCCA are unpowered). The VCCJ pin must be powered to enable
the JTAG port. The ATDI pin provides an alternate connection to the JTAG header while bypassing all the un-pow-
ered devices in the JTAG chain. TDISEL pin enables switching between the ATDI and the standard JTAG signal
TDI. When the internally pulled-up TDISEL = 1, standard TDI pin is enabled and when the TDISEL = 0, ATDI is
enabled.
In order to use this feature the JTAG signals of the ispPAC-POWR1014/A are connected to the header as shown in
Figure 2-27. Note: The ispPAC-POWR1014/A should be the last device in the JTAG chain.
After programming, the VCCPROG pin MUST be left floating before applying power to the VCCD and VCCA pins.
Figure 2-27. ispPAC-POWR1014/A Alternate TDI Configuration Diagram
Alternate TDI Selection Via JTAG Command
When the TDISEL pin held high and four consecutive IDCODE instructions are issued, ispPAC-POWR1014/A
responds by making its active JTAG data input the ATDI pin. When ATDI is selected, data on its TDI pin is ignored
until the JTAG state machine returns to the Test-Logic-Reset state.
This method of selecting ATDI takes advantage of the fact that a JTAG device with an IDCODE register will auto-
matically load its unique IDCODE instruction into the Instruction Register after a Test-Logic-Reset. This JTAG
capability permits blind interrogation of devices so that their location in a serial chain can be identified without hav-
ing to know anything about them in advance. A blind interrogation can be made using only the TMS and TCLK con-
trol pins, which means TDI and TDO are not required for performing the operation. Figure 2-28 illustrates the logic
for selecting whether the TDI or ATDI pin is the active data input to ispPAC-POWR1014/A.
VCCPROG
TDISEL
TMS
TDO
TCK
TDI
JTAG Signal
Connector
VCCPROG for programming ispPAC-POWR1014/A through ATDI (VCC should be off)
TDI
Other JTAG
Device(s)
VCCJ
2-34
TDO
only after confirming
Apply power to VCC
VCCPROG supply
is disconnected.
ATDI
TDI
ispPAC-POWR1014/A Data Sheet
ispPAC-POWR
1014A
VCCPROG
TDO