ispPAC-POWR1014-01T48I Lattice, ispPAC-POWR1014-01T48I Datasheet - Page 45

Supervisory Circuits Prec. Prog. Pwr Sppl y Seq. Mon. Trim I

ispPAC-POWR1014-01T48I

Manufacturer Part Number
ispPAC-POWR1014-01T48I
Description
Supervisory Circuits Prec. Prog. Pwr Sppl y Seq. Mon. Trim I
Manufacturer
Lattice
Series
ispPAC®r

Specifications of ispPAC-POWR1014-01T48I

Number Of Voltages Monitored
10
Output Type
Open Collector / Drain
Manual Reset
Not Resettable
Watchdog
No Watchdog
Power-up Reset Delay (typ)
500 ms
Supply Voltage (max)
3.96 V
Supply Voltage (min)
2.8 V
Supply Current (typ)
20 mA
Mounting Style
SMD/SMT
Package / Case
TQFP-48
Applications
General Purpose
Voltage - Input
-0.3 V ~ 5.9 V
Voltage - Supply
2.8 V ~ 3.96 V
Current - Supply
20mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
*
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ISPPAC-POWR1014-01T48I
Manufacturer:
Lattice Semiconductor Corporation
Quantity:
10 000
Part Number:
ISPPAC-POWR1014-01T48I
Manufacturer:
LATTICE
Quantity:
790
Part Number:
ISPPAC-POWR1014-01T48I
Manufacturer:
LATTICE
Quantity:
20 000
Lattice Semiconductor
During the I2C_Data_Register read operation - When I2C_Control_Register bit 5 = 0, and bit 4 = 0, the Byte 3
value will return INPUT_VALUE register.
During the I2C_Data_Register read operation - When I2C_Control_Register bit 5 = 0, and bit 4 = 1 Byte 3 value will
return INPUT_STATUS register.
Output Status and GP_Output Registers
Byte 2, Byte 1: These bytes control the digital outputs and HVOUT outputs during the write operation. The Output
Status and GP_Output register association with the outputs are shown in Figure 2-21. During the write operation,
the Gp_Output 1 and Gp_Output 2 registers are written with values specified in Byte 2 and Byte 1, when the
I2C_Control_Register bits 3 and 2 are set to 0x10b and bits 1 and 0 are set to 0x10b. During the
I2C_Data_Register read operation (I2C_Control_Register bits 3 and 2 = 0x00b and bits 1 and 0 = 0x00b), Byte 2
and Byte 1 return the GP_Output registers. If I2C_Control_Register bits 3 and 2 = 0x01b and bits 1 and 0 = 0x01b,
Byte 2 and Byte 1 will return the OUTPUT STATUS registers.
Figure 2-40. Output Status and GP_Output Registers, Byte 2
Byte 3 – INPUT_STATUS (Read operation) – When I2C_Control_Register Bit 5=0 and Bit 4=1, I
Byte 2 – GP_OUTPUT1 (Write operation) – When I2C_Control_Register Bit 3 =1, Bit 2=0, I
Byte 2 – GP_OUTPUT1 (Read Operation) – When I2C_Control_Register Bit 3 =0, Bit 2=0, I
Byte 2 – OUTPUT_STATUS0 (Read Operation) – When I2C_Control_Register Bit 3 =0, Bit 2=1, I
Byte 3 – INPUT_VALUE (Read operation) – When I2C_Control_Register Bit 5=0 and Bit 4=0, I
HVOUT1
GP1
GP1
(23)
(15)
(15)
(15)
(23)
X
X
HVOUT2
GP2
(22)
GP2
(14)
IN2
(14)
(14)
(22)
I2
GP3_ENb
GP3_ENb
(21)
OUT3
IN3
(13)
(13)
(21)
(13)
I3
OUT4
(20)
IN4
GP4
GP4
(12)
(12)
(20)
(12)
I4
OUT5
(11)
(19)
GP5
GP5
(11)
(11)
(19)
1
1
2-45
OUT6
(18)
GP6
GP6
(10)
(10)
(10)
(18)
1
1
OUT7
GP7
GP7
(17)
(9)
(9)
(9)
(17)
1
1
ispPAC-POWR1014/A Data Sheet
OUT8
GP8
GP8
(16)
(8)
(8)
1
(8)
(16)
1
2
2
C Address = 0x0E
C Address = 0x0E
2
2
C Address = 0x11
2
C Address = 0x06
C Address = 0x03

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