ispPAC-POWR1014-01T48I Lattice, ispPAC-POWR1014-01T48I Datasheet - Page 52

• Manufacturer Part Number: ispPAC-POWR1014-01T48I
• Description: Supervisory Circuits Prec. Prog. Pwr Sppl y Seq. Mon. Trim I
• Manufacturer: Lattice
• Series: ispPAC®r

Specifications of ispPAC-POWR1014-01T48I

• Number Of Voltages Monitored: 10
• Output Type: Open Collector / Drain
• Manual Reset: Not Resettable
• Watchdog: No Watchdog
• Power-up Reset Delay (typ): 500 ms
• Supply Voltage (max): 3.96 V
• Supply Voltage (min): 2.8 V
• Supply Current (typ): 20 mA
• Mounting Style: SMD/SMT
• Package / Case: TQFP-48
• Applications: General Purpose
• Voltage - Input: -0.3 V ~ 5.9 V
• Voltage - Supply: 2.8 V ~ 3.96 V
• Current - Supply: 20mA
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: *
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

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Revision History
October 2006
November 2009
November 2009
February 2006
August 2007
March 2006
March 2007
June 2008
May 2006
Date
[phone] (Outside North America)
[e-mail]
www.latticesemi.com
Version
01.0
01.1
01.2
01.3
01.4
01.5
01.6
01.7
01.8
Initial release.
ispPAC-POWR1014/A block diagram:
Pin Descriptions table: “InxP” changed to “Inx”, “MONx” to “VMONx”, VMON upper range
from “5.75V” to “5.87V”.
Pin Descriptions table, note 4 - clarification for un-used VMON pins to be tied to GNDD.
Absolute Maximum Ratings table and Recommended Operating Conditions table:
“VMON+” changed to VMON”.
Digital Specifications table: add note # 2 to ISINKTOTAL: “Sum of maximum current sink
by all digital outputs. Reliable operation is not guaranteed if this value is exceeded.”
Typographical corrections: Vmon trip points and thresholds
Typographical corrections: “InxP” to “Inx”, “MONx” to “VMONx”.
Update HVOUT I source range: 12.5µA to 100µA
Clarify operation of ADC conversions
Digital Specifications table, added footnotes on I
TAP Instructions table, clarify DISCHARGE instruction of JTAG. Added instruction descrip-
tions for others.
Data sheet status changed to “Final”
Analog Specifications table, reduced Max. I
Tightened Input Resistor Variation to 15%.
AC/Transient Characteristics table, tightened Internal Oscillator frequency variation down
to 5%.
Digital Specifications table, included V
Corrected VCCINP Voltage range from "2.25V to 3.6V" to "2.25V to 5.5V".
Removed reference to Internal Pull-up resistor for signal line TDO.
Corrected the Maximum Vmon Range value from 5.734V to 5.867V.
Removed references to VPS[0:1].
Modified PLD Architecture figure to show input registers.
Updated I
V
Added Accessing I
Added product information for the ispPAC-POWR1014-02 and ispPAC-POWR1014A-02.
Changes to HVOUT pin specifications.
Added timing diagram and timing parameters to "Power-On Reset" specifications.
VCCPROG pin usage further clarified.
Added ESD Performance table.
CCPROG
2
pin usage clarification added.
C Control Registers table.
2
C Registers Through JTAG section.
2-52
Change Summary
IL
and V
“SELTDI” changed to “TDISEL”.
ispPAC-POWR1014/A Data Sheet
CC
IH
to 20 mA.
2
specifications for I
C frequency
2
C interface.