STM8AF52AA

Manufacturer Part NumberSTM8AF52AA
DescriptionSTM8AF52 CAN Line
ManufacturerSTMicroelectronics
STM8AF52AA datasheet
 


Specifications of STM8AF52AA

Max Fcpu24 MHzProgram Memory32 to 128 Kbytes Flash program; data retention 20 years at 55 °C
Data Memoryup to 2 Kbytes true data EEPROM; endurance 300 kcyclesRam2 Kbytes to 6 Kbytes
Advanced Control Timer16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization  
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STM8AF52/62xx, STM8AF51/61xx
High-precision baud rate generator system
Common programmable transmit and receive baud rates up to f
Programmable data word length (8 or 9 bits)
Configurable stop bits: Support for 1 or 2 stop bits
LIN master mode:
LIN break and delimiter generation
LIN break and delimiter detection with separate flag and interrupt source for
readback checking.
Transmitter clock output for synchronous communication
Separate enable bits for transmitter and receiver
Transfer detection flags:
Receive buffer full
Transmit buffer empty
End of transmission flags
Parity control:
Transmits parity bit
Checks parity of received data byte
Four error detection flags:
Overrun error
Noise error
Frame error
Parity error
Six interrupt sources with flags:
Transmit data register empty
Transmission complete
Receive data register full
Idle line received
Parity error
LIN break and delimiter detection
Two interrupt vectors:
Transmitter interrupt
Receiver interrupt
Reduced power consumption mode
Wakeup from mute mode (by idle line detection or address mark detection)
Two receiver wakeup modes:
Address bit (MSB)
Idle line
5.9.2
Universal asynchronous receiver/transmitter with LIN support
(LINUART)
The devices covered by this datasheet contain one LINUART interface. The interface is
available on all the supported packages. The LINUART is an asynchronous serial
Doc ID 14395 Rev 8
Product overview
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MASTER
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