STM8AF52AA

Manufacturer Part NumberSTM8AF52AA
DescriptionSTM8AF52 CAN Line
ManufacturerSTMicroelectronics
STM8AF52AA datasheet
 


Specifications of STM8AF52AA

Max Fcpu24 MHzProgram Memory32 to 128 Kbytes Flash program; data retention 20 years at 55 °C
Data Memoryup to 2 Kbytes true data EEPROM; endurance 300 kcyclesRam2 Kbytes to 6 Kbytes
Advanced Control Timer16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization  
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Page 50/106

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Interrupt table
8
Interrupt table
Table 18.
STM8A interrupt table
Priority Source block
Reset
Reset
TRAP
SW interrupt
0
TLI
External top level interrupt
1
AWU
Auto-wakeup from Halt
Clock
2
Main clock controller
controller
3
MISC
External interrupt E0
4
MISC
External interrupt E1
5
MISC
External interrupt E2
6
MISC
External interrupt E3
7
MISC
External interrupt E4
8
CAN
CAN interrupt Rx
9
CAN
CAN interrupt TX/ER/SC
10
SPI
End of transfer
Update/overflow/
11
Timer 1
trigger/break
12
Timer 1
Capture/compare
13
Timer 2
Update/overflow
14
Timer 2
Capture/compare
15
Timer 3
Update/overflow
16
Timer 3
Capture/compare
17
USART
Tx complete
18
USART
Receive data full reg.
2
2
19
I
C
I
C interrupts
20
LINUART
Tx complete/error
21
LINUART
Receive data full reg.
22
ADC
End of conversion
23
Timer 4
Update/overflow
End of programming/
24
EEPROM
write in not allowed area
1. All unused interrupts must be initialized with ‘IRET’ for robust programming.
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(1)
Interrupt vector
Description
address
0x00 6000
0x00 8004
0x00 8008
0x00 800C
0x00 8010
0x00 8014
0x00 8018
0x00 801C
0x00 8020
0x00 8024
0x00 8028
0x00 802C
0x00 8030
0x00 8034
0x00 8038
0x00 803C
0x00 8040
0x00 8044
0x00 8048
0x00 804C
0x00 8050
0x00 8054
0x00 8058
0x00 805C
0x00 8060
0x00 8064
0x00 8068
Doc ID 14395 Rev 8
STM8AF52/62xx, STM8AF51/61xx
Wakeup
Comments
from Halt
Yes
Reset vector in ROM
Yes
Yes
Port A interrupts
Yes
Port B interrupts
Yes
Port C interrupts
Yes
Port D interrupts
Yes
Port E interrupts
Yes
Yes
Yes