STM8AF52AA

Manufacturer Part NumberSTM8AF52AA
DescriptionSTM8AF52 CAN Line
ManufacturerSTMicroelectronics
STM8AF52AA datasheet
 


Specifications of STM8AF52AA

Max Fcpu24 MHzProgram Memory32 to 128 Kbytes Flash program; data retention 20 years at 55 °C
Data Memoryup to 2 Kbytes true data EEPROM; endurance 300 kcyclesRam2 Kbytes to 6 Kbytes
Advanced Control Timer16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization  
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STM8AF52/62xx, STM8AF51/61xx
14
Revision history
Table 55.
Document revision history
Date
31-Jan-2008
22-Aug-2008
Revision
Rev 1
Initial release
Added ‘H’ products to the datasheet (Flash no EEPROM).
Features on page
1: Updated Memories,
management,
Communication interfaces
by 1.
Table
1: Removed STM8AF6168, STM8AF6148, STM8AF6166,
STM8AF6146, STM8AF5168, STM8AF5186, STM8AF5176, and
STM8AF5166.
Section
1,
Section
5,
reference documentation: RM0009, PM0047, and UM0470.
Section
2: Added information about peak performance.
Section
3: Removed
Table
4: Removed STM8AF5186T, STM8AF5176T, STM8AF5168T,
and STM8AF5166T.
Table
5: Removed STM8AF6168T, STM8AF6166T, STM8AF6148T,
and STM8AF6146T.
Section
5: Made minor content changes and improved readability
and layout.
Section
5.5.3: Major modification, TMU included.
Section
5.5.2: User trimming updated.
Section
5.5.3: LSI as CPU clock added.
Section 5.5.4
,
Section
Kbyte/128 Kbyte.
Section
5.8: Scan for 128 Kbyte removed.
Rev 2
Section
5.9,
Section
Figure
3,
Figure
4, and
Table
11: HS output changed from 20 mA to 8 mA.
Section
7: Corrected
address list; added
Table
Section 10.3.2
Note on typical/WC values added.
Table
17: Replaced the source blocks ‘simple USART’, ‘very low-end
timer (timer 4)’, and ‘EEPROM’ with ‘LINUART’, ‘timer4’ and
‘reserved’ respectively, added TMU registers.
Table
19: Updated OPT6 and NOPT6, added OPT7 to 17 (TMU, BL)
Table
20: Updated OPT1 UBC[7:0], OPT4 CKAWUSEL, OPT4
PRSC [1:0], and OPT6, added OPT7 to 16 (TMU).
Table
22: Amended footnotes.
Table
25: Added parameter ‘voltage and current operating
conditions’.
Table
26: Amended footnotes.
Table
27: Replaced.
Table
28: Amended maximum data and footnotes.
Table
21: Replaced.
Table
22: Added and amended I
data; amended footnotes.
Table
31: Filled in, amended maximum data and footnotes.
Figure 12
to
Figure
17: info on peripheral activity added.
Table
32: Modified f
HSE_ext
Doc ID 14395 Rev 8
Revision history
Changes
Reset and supply
and ; reduced wakeup pins
Section
6.2,
Table
20, and
Section
STM8A common features
table.
5.5.5: Maximum frequency conditional 32
5.9.3: SPI 10 Mb/s.
Figure
5: Amended footnote 1.
Figure 7: Register and memory
map; removed
13.
data; amended I
DD(RUN)
data and added V
data.
HSEdhl
9: Updated
DD(WFI)
99/106