ep2s130 Altera Corporation, ep2s130 Datasheet - Page 145

• Manufacturer Part Number: ep2s130
• Description: Stratix Ii Device Family Data Sheet
• Manufacturer: Altera Corporation

Altera Corporation
May 2007
Note to
(1)
V
V
V
V
V
R
V
V
V
V
Δ V
V
Δ V
R
V
V
Table 5–12. LVPECL Specifications
Table 5–13. HyperTransport Technology Specifications
Table 5–14. 3.3-V PCI Specifications (Part 1 of 2)
Symbol
Symbol
Symbol
CCIO
ID
ICM
OD
OCM
CCIO
ID
ICM
OD
OCM
CCIO
IH
L
L
OD
OCM
The top and bottom clock input differential buffers in I/O banks 3, 4, 7, and 8 are powered by V
The PLL clock output/feedback differential buffers are powered by VCC_PLL_OUT. For differential clock
output/feedback operation, VCC_PLL_OUT should be connected to 3.3 V.
(1)
Table
I/O supply voltage
Input differential voltage
swing (single-ended)
Input common mode voltage
Output differential voltage
(single-ended)
Output common mode
voltage
Receiver differential input
resistor
I/O supply voltage for left and
right I/O banks (1, 2, 5, and 6)
Input differential voltage swing
(single-ended)
Input common mode voltage
Output differential voltage
(single-ended)
Change in V
and low
Output common mode voltage R
Change in V
and low
Receiver differential input
resistor
Output supply voltage
High-level input voltage
5–12:
Parameter
Parameter
Parameter
OCM
OD
between high
between high
R
R
L
L
R
R
R
R
R
= 100 Ω
= 100 Ω
Conditions
L
L
L
L
L
L
Conditions
Conditions
= 100 Ω
= 100 Ω
= 100 Ω
= 100 Ω
= 100 Ω
= 100 Ω
0.5 × V
Minimum
Minimum
Minimum
3.135
1,650
2.375
300
525
300
385
400
440
1.0
3.0
90
90
CCIO
Stratix II Device Handbook, Volume 1
DC & Switching Characteristics
Typical
Typical
Typical
3.300
2.500
600
100
600
600
600
600
100
3.3
V
Maximum
Maximum
Maximum
CCIO
CCINT
3.465
1,000
2,250
2.625
970
110
900
845
820
780
110
2.5
3.6
75
50
+ 0.5
, not V
CCIO
Unit
Unit
Unit
mV
mV
mV
mV
mV
mV
mV
mV
mV
5–9
V
V
V
Ω
V
Ω
V
.