ep2s130 Altera Corporation, ep2s130 Datasheet - Page 63

• Manufacturer Part Number: ep2s130
• Description: Stratix Ii Device Family Data Sheet
• Manufacturer: Altera Corporation

Altera Corporation
May 2007
Figure 2–38. Regional Clock Control Blocks
Notes to
(1)
(2)
(3)
These clock select signals can only be set through a configuration file (.sof or .pof)
and cannot be dynamically controlled during user mode operation.
Only the CLKn pins on the top and bottom of the device feed to regional clock select
blocks.The clock outputs from corner PLLs cannot be dynamically selected
through the global clock control block.
The clock outputs from corner PLLs cannot be dynamically selected through the
global clock control block.
Figure
PLL Counter
2–38:
Outputs
(3)
2
CLKp
Pin
Enable/
Disable
RCLK
CLKn
Pin
Stratix II Device Handbook, Volume 1
(2)
Internal
Logic
Static Clock Select (1)
Internal
Logic
Stratix II Architecture
2–55