ep2s130 Altera Corporation, ep2s130 Datasheet - Page 208

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ep2s130

Manufacturer Part Number
ep2s130
Description
Stratix Ii Device Family Data Sheet
Manufacturer
Altera Corporation
Datasheet

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Timing Model
5–72
Stratix II Device Handbook, Volume 1
1.8-V LVTTL
3.3-V LVCMOS
1.5-V LVCMOS
SSTL-2 Class I
SSTL-2 Class II
SSTL-18 Class I
SSTL-18 Class II
1.2-V HSTL
1.5-V HSTL
Class I
1.8-V HSTL
Class I
1.8-V HSTL
Class II
Differential
SSTL-2 Class I
Differential
SSTL-2 Class II
Differential
SSTL-18 Class I
Differential
SSTL-18 Class II
1.8-V Differential
HSTL Class I
1.8-V Differential
HSTL Class II
1.5-V Differential
HSTL Class I
Table 5–78. Maximum Output Toggle Rate on Stratix II Devices (Part 4 of 5)
I/O Standard
(2)
OCT 50 Ω
OCT 50 Ω
OCT 50 Ω
OCT 50 Ω
OCT 25 Ω
OCT 50 Ω
OCT 25 Ω
OCT 50 Ω
OCT 50 Ω
OCT 50 Ω
OCT 25 Ω
OCT 50 Ω
OCT 25 Ω
OCT 50 Ω
OCT 25 Ω
OCT 50 Ω
OCT 25 Ω
OCT 50 Ω
Strength
Drive
Column I/O Pins (MHz)
700
350
550
600
600
560
550
280
600
650
500
600
600
560
550
650
500
600
-3
550
350
450
500
550
400
500
550
600
500
500
550
400
500
600
500
550
-4
-
450
300
400
500
500
350
450
500
600
450
500
500
350
450
600
450
500
-5
-
700
350
550
600
600
590
600
650
600
600
590
650
600
Row I/O Pins (MHz)
-3
-
-
-
-
-
550
350
450
500
550
400
550
600
500
550
400
600
550
-4
-
-
-
-
-
450
300
400
500
500
350
500
600
500
500
350
600
500
-5
-
-
-
-
-
Note (1)
Clock Outputs (MHz)
700
350
550
600
600
450
550
280
600
650
500
600
600
560
550
650
500
600
-3
Altera Corporation
550
350
450
500
550
400
500
550
600
500
500
550
400
500
600
500
550
-4
-
May 2007
450
300
400
500
500
350
450
500
600
450
500
500
350
450
600
450
500
-5
-

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