S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 155

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

4.3
This section provides a detailed description of all registers accessible in the XINT module.
4.3.1
Table 4-3
Freescale Semiconductor
Memory Map and Register Definition
gives an overview over all XINT module registers.
Module Memory Map
0x0122–0x0125
Address
0x012A
0x012B
0x012C
0x012D
0x012E
0x0120
0x0121
0x0126
0x0127
0x0128
0x0129
0x012F
S12XS Family Reference Manual, Rev. 1.11
Interrupt Request Configuration Address Register
Interrupt Request Configuration Data Register 0
Interrupt Request Configuration Data Register 1
Interrupt Request Configuration Data Register 2
Interrupt Request Configuration Data Register 3
Interrupt Request Configuration Data Register 4
Interrupt Request Configuration Data Register 5
Interrupt Request Configuration Data Register 6
Interrupt Request Configuration Data Register 7
XGATE Interrupt Priority Configuration Register
Table 4-3. XINT Memory Map
Interrupt Vector Base Register (IVBR)
(INT_CFDATA0)
(INT_CFDATA1)
(INT_CFDATA3)
(INT_CFDATA4)
(INT_CFDATA5)
(INT_CFDATA6)
(INT_CFDATA7)
(INT_CFADDR)
(INT_XGPRIO)
(INT_CFDATA2
RESERVED
RESERVED
Use
Access
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
—
—
Interrupt (S12XINTV2)
155