S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 584

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

128 KByte Flash Module (S12XFTMR128K1V1)
During the reset sequence, the FOPT register is loaded from the Flash nonvolatile byte in the Flash
configuration field at global address 0x7F_FF0E located in P-Flash memory (see
by reset condition F in
containing the Flash nonvolatile byte during the reset sequence, all bits in the FOPT register will be set.
19.3.2.16 Flash Reserved2 Register (FRSV2)
This Flash register is reserved for factory testing.
All bits in the FRSV2 register read 0 and are not writable.
19.3.2.17 Flash Reserved3 Register (FRSV3)
This Flash register is reserved for factory testing.
All bits in the FRSV3 register read 0 and are not writable.
19.3.2.18 Flash Reserved4 Register (FRSV4)
This Flash register is reserved for factory testing.
584
NV[7:0]
Offset Module Base + 0x0011
Offset Module Base + 0x0012
Reset
Reset
Field
7–0
W
W
R
R
Nonvolatile Bits — The NV[7:0] bits are available as nonvolatile bits. Refer to the device user guide for proper
use of the NV bits.
0
0
0
0
7
7
= Unimplemented or Reserved
= Unimplemented or Reserved
Figure
0
0
0
0
6
6
Figure 19-23. Flash Reserved2 Register (FRSV2)
Figure 19-24. Flash Reserved3 Register (FRSV3)
19-22. If a double bit fault is detected while reading the P-Flash phrase
S12XS Family Reference Manual, Rev. 1.11
Table 19-27. FOPT Field Descriptions
0
0
0
0
5
5
0
0
0
0
4
4
Description
0
0
0
0
3
3
0
0
0
0
2
2
Table
Freescale Semiconductor
0
0
0
0
1
1
19-3) as indicated
0
0
0
0
0
0