S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 670

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S9S12XS256J0CAL

Manufacturer Part Number
S9S12XS256J0CAL
Description
MCU 256K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12XS256J0CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
8K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XS
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
91
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12XSFAME, EVB9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Electrical Characteristics
4MHz loop controlled Pierce oscillator. Production test parameters are tested with a 4MHz square wave
oscillator.
Table A-10
A.1.10.3
Unbonded ports must be correctly initialized to prevent current consumption due to floating inputs. Typical
Stop current is measured with V
Stop currents are measured with the oscillator configured for 4MHz LCP mode. Production test parameters
are tested with a 4MHz square wave oscillator.
A.1.10.4
670
Table A-10. Module Configurations for Maximum Run Supply (VDDR+VDDA) Current
Conditions are shown in
Num
Peripheral
S12XCPU
Overhead
1
2
3
4
5
6
7
8
MSCAN
PWM
ATD
SPI
SCI
TIM
shows the configuration of the peripherals for maximum run current
C
T
T
T
T
T
T
T
T
Stop Current Conditions
Measurement Results
420 cycle loop: 384 DBNE cycles plus subroutine entry to stimulate stacking (RAM access)
Configured to loop-back mode using a bit rate of 1Mbit/s
Configured to master mode, continuously transmit data (0x55 or 0xAA) at 4Mbit/s
Configured into loop mode, continuously transmit data (0x55) at speed of 57600 baud
Configured to toggle its pins at the rate of 40kHz
The peripheral shall be configured in output compare mode. Pulse accumulator and modulus
counter enabled.
The peripheral is configured to operate at its maximum specified
frequency and to continuously convert voltages on all input channels in sequence.
VREG supplying 1.8V from a 5V input voltage, PLL on
Table A-9
DD35
Table A-11. Module Run Supply Currents
S12XS Family Reference Manual, Rev. 1.11
S12XCPU
Overhead
at ambient temperature unless otherwise noted
MSCAN
Rating
PWM
ATD
=5V, maximum Stop current is measured with V
SCI
TIM
SPI
Configuration
Min
13.6
Typ
1.1
0.5
0.4
0.6
0.9
0.3
1.7
Freescale Semiconductor
DD35
Max
V
DD35
=5.5V. Pseudo
=5.5V
Unit
mA

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