S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 230

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Security (S12XS9SECV2)
7.1.2
7.1.3
Once the user has programmed the Flash and EEPROM, the chip can be secured by programming the
security bits located in the options/security byte in the Flash memory array. These non-volatile bits will
keep the device secured through reset and power-down.
The options/security byte is located at address 0xFF0F (= global address 0x7F_FF0F) in the Flash memory
array. This byte can be erased and programmed like any other Flash location. Two bits of this byte are used
for security (SEC[1:0]). On devices which have a memory page window, the Flash options/security byte
is also available at address 0xBF0F by selecting page 0x3F with the PPAGE register. The contents of this
byte are copied into the Flash security register (FSEC) during a reset sequence.
The meaning of the bits KEYEN[1:0] is shown in
the MCU Using the Backdoor Key Access”
The meaning of the security bits SEC[1:0] is shown in
security is controlled by two bits. To put the device in unsecured mode, these bits must be programmed to
230
1
2
EEPROM Array Access
Restricted NVM command set only. Please refer to the NVM wrapper block guides for detailed information.
BDM hardware commands restricted to peripheral registers only.
DBG Module Trace
NVM Commands
0xFF0F
Modes of Operation
Securing the Microcontroller
BDM
Table 7-2. Feature Availability in Unsecure and Secure Modes on S12XS
KEYEN1
7
KEYEN0
NS
✔
KEYEN[1:0]
✔
✔
✔
Table 7-3. Backdoor Key Access Enable Bits
1
6
Figure 7-1. Flash Options/Security Byte
S12XS Family Reference Manual, Rev. 1.11
00
01
10
11
SS
✔
✔
✔
✔
Unsecure Mode
NV5
5
NX
for more information.
ES
NV4
Table
4
EX
Table
7-3. Please refer to
Access Enabled
Backdoor Key
NV3
ST
0 (disabled)
0 (disabled)
0 (disabled)
7-4. For security reasons, the state of device
1 (enabled)
3
NS
✔
—
—
✔
1
NV2
2
SS
✔
✔
—
✔
1
2
Section 7.1.5.1, “Unsecuring
Secure Mode
NX
SEC1
1
Freescale Semiconductor
ES
SEC0
EX
0
ST