S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 237

no-image

S9S12XS256J0CAL

Manufacturer Part Number
S9S12XS256J0CAL
Description
MCU 256K FLASH 112-LQFP
Manufacturer
Freescale Semiconductor
Series
HCS12r
Datasheet

Specifications of S9S12XS256J0CAL

Core Processor
HCS12X
Core Size
16-Bit
Speed
40MHz
Connectivity
CAN, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
91
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Eeprom Size
8K x 8
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
1.72 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
112-LQFP
Processor Series
S12XS
Core
HCS12
Data Bus Width
16 bit
Data Ram Size
12 KB
Interface Type
CAN, SCI, SPI
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
91
Number Of Timers
12
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWHCS12
Development Tools By Supplier
DEMO9S12XSFAME, EVB9S12XEP100
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
S9S12XS256J0CAL
Manufacturer:
FREESCALE
Quantity:
3 598
Part Number:
S9S12XS256J0CAL
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Part Number:
S9S12XS256J0CAL
Manufacturer:
FREESCALE
Quantity:
3 598
Part Number:
S9S12XS256J0CAL
Manufacturer:
FREESCALE
Quantity:
20 000
8.2
This section lists and describes the signals that connect off chip.
8.2.1
These pins provides operating voltage (V
the supply voltage to the IPLL to be independently bypassed. Even if IPLL usage is not required V
and V
8.2.2
RESET is an active low bidirectional reset pin. As an input it initializes the MCU asynchronously to a
known start-up state. As an open-drain output it indicates that an system reset (internal to MCU) has been
triggered.
Freescale Semiconductor
SSPLL
XCLKS
EXTAL
XTAL
Signal Description
must be connected to properly.
V
RESET
V
V
DDPLL
DDPLL
SSPLL
RESET
S12X_MMC
Oscillator
Monitor
Clock
Regulator
Voltage
, V
SSPLL
ICRG
OSCCLK
Figure 8-1. Block diagram of S12XECRG
IPLL
Illegal Address Reset
Power on Reset
Low Voltage Reset
S12XS Family Reference Manual Rev. 1.11
PLLCLK
CM Fail
DDPLL
) and ground (V
Clock and Reset Control
COP
Clock Quality
Generator
Registers
Checker
Reset
SSPLL
S12XE Clocks and Reset Generator (S12XECRGV1)
RTI
) for the IPLL circuitry. This allows
System Reset
Bus Clock
Core Clock
Oscillator Clock
Real Time Interrupt
PLL Lock Interrupt
Self Clock Mode
Interrupt
DDPLL
237

Related parts for S9S12XS256J0CAL