S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 81

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1
single-chip
single-chip
2.3.12
Freescale Semiconductor
Special
Normal
Read: Anytime.
Write: Anytime.
Reset:
Address 0x001C (PRR)
RDPB
RDPA
Field
1
0
W
R
Port B reduced drive—Select reduced drive for output port
This bit configures the drive strength of all associated port output pins as either full or reduced. If a pin is used as
input this bit has no effect. The reduced drive function is independent of which function is being used on a particular
pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
Port A reduced drive—Select reduced drive for output port
This bit configures the drive strength of all associated port output pins as either full or reduced. If a pin is used as
input this bit has no effect. The reduced drive function is independent of which function is being used on a particular
pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
NECLK
Depen-
ECLK Control Register (ECLKCTL)
Mode
dent
0
1
7
= Unimplemented or Reserved
NCLKX2
Table 2-11. RDRIV Register Field Descriptions (continued)
1
1
1
6
Figure 2-10. ECLK Control Register (ECLKCTL)
S12XS Family Reference Manual, Rev. 1.11
DIV16
0
0
0
5
EDIV4
0
0
0
4
Description
EDIV3
3
0
0
0
EDIV2
Port Integration Module (S12XSPIMV1)
0
0
0
2
Access: User read/write
EDIV1
0
0
0
1
EDIV0
0
0
0
0
81
1