S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 282

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Analog-to-Digital Converter (ADC12B16CV1)
10.3.2.5
Writes to this register will abort current conversion sequence.
Read: Anytime
Write: Anytime
282
Module Base + 0x0004
SMP[2:0]
PRS[4:0]
Reset
Field
7–5
4–0
W
R
SMP2
Sample Time Select — These three bits select the length of the sample time in units of ATD conversion clock
cycles. Note that the ATD conversion clock period is itself a function of the prescaler value (bits PRS4-0).
Table 10-13
ATD Clock Prescaler — These 5 bits are the binary prescaler value PRS. The ATD conversion clock frequency
is calculated as follows:
Refer to Device Specification for allowed frequency range of f
ATD Control Register 4 (ATDCTL4)
0
7
FRZ1
0
0
1
1
lists the available sample time lengths.
SMP1
f ATDCLK
SMP2
Table 10-11. ATD Behavior in Freeze Mode (Breakpoint)
0
6
0
0
0
0
1
1
1
Figure 10-7. ATD Control Register 4 (ATDCTL4)
FRZ0
0
1
0
1
Table 10-12. ATDCTL4 Field Descriptions
=
S12XS Family Reference Manual, Rev. 1.11
------------------------------------ -
2
SMP1
SMP0
×
Table 10-13. Sample Time Select
Continue conversion
Reserved
Finish current conversion, then freeze
Freeze Immediately
(
0
0
1
1
0
0
1
0
5
f BUS
PRS
+
1
)
SMP0
0
1
0
1
0
1
0
0
4
Behavior in Freeze Mode
Description
ATD Clock Cycles
0
3
Sample Time
in Number of
ATDCLK
10
12
16
20
4
6
8
.
PRS[4:0]
1
2
Freescale Semiconductor
0
1
1
0