S9S12XS256J0CAL Freescale Semiconductor, S9S12XS256J0CAL Datasheet - Page 67

• Manufacturer Part Number: S9S12XS256J0CAL
• Description: MCU 256K FLASH 112-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of S9S12XS256J0CAL

• Core Processor: HCS12X
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 91
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 8K x 8
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 16x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 112-LQFP
• Processor Series: S12XS
• Core: HCS12
• Data Bus Width: 16 bit
• Data Ram Size: 12 KB
• Interface Type: CAN, SCI, SPI
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 91
• Number Of Timers: 12
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: DEMO9S12XSFAME, EVB9S12XEP100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 16 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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Freescale Semiconductor
Port
AD
H
J
Write access not applicable for one or more register bits. Refer to register description.
Refer to memory map in SoC Guide to determine related module.
Mode dependent.
Read always returns logic level on pins.
Offset or
Address
0x026C
0x026D
0x026A
0x026B
0x026E
0x026F
0x027F
0x0260
0x0261
0x0262
0x0263
0x0264
0x0265
0x0266
0x0267
0x0268
0x0269
0x0270
0x0271
0x0272
0x0273
0x0274
0x0275
0x0276
0x0277
0x0278
:
PTH—Port H Data Register
PTIH—Port H Input Register
DDRH—Port H Data Direction Register
RDRH—Port H Reduced Drive Register
PERH—Port H Pull Device Enable Register
PPSH—Port H Polarity Select Register
PIEH—Port H Interrupt Enable Register
PIFH—Port H Interrupt Flag Register
PTJ—Port J Data Register
PTIJ—Port J Input Register
DDRJ—Port J Data Direction Register
RDRJ—Port J Reduced Drive Register
PERJ—Port J Pull Device Enable Register
PPSJ—Port J Polarity Select Register
PIEJ—Port J Interrupt Enable Register
PIFJ—Port J Interrupt Flag Register
PT0AD0—Port AD0 Data Register 0
PT1AD0—Port AD0 Data Register 1
DDR0AD0—Port AD0 Data Direction Register 0
DDR1AD0—Port AD0 Data Direction Register 1
RDR0AD0—Port AD0 Reduced Drive Register 0
RDR1AD0—Port AD0 Reduced Drive Register 1
PER0AD0—Port AD0 Pull Up Enable Register 0
PER1AD0—Port AD0 Pull Up Enable Register 1
PIM Reserved
Table 2-2. Block Memory Map (continued)
S12XS Family Reference Manual, Rev. 1.11
Register
Access Reset Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
Port Integration Module (S12XSPIMV1)
0xFF
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
4
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