HD64F3337YCP16V Renesas Electronics America, HD64F3337YCP16V Datasheet - Page 253

• Manufacturer Part Number: HD64F3337YCP16V
• Description: MCU 3/5V 60K PB-FREE 84-PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16V

• Core Size: 8-Bit
• Program Memory Size: 60KB (60K x 8)
• Oscillator Type: Internal
• Core Processor: H8/300
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• No. Of I/o's: 74
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 6
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PLCC
• Controller Family/series: H8/300
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Direct Output (OS = 0)
1. When (OE = 0)—(a) in Figure 10.3
2. When (OE = 1)
Inverted Output (OS = 1)—(e) in Figure 10.3: The operation is the same except that high and
low are reversed in the PWM output. [(e) in figure 10.3]
10.4
Some notes on the use of the PWM timer module are given below.
1. Any necessary changes to the clock select bits (CKS2 to CKS0) and output select bit (OS)
2. If the DTR value is H'00, the duty cycle is 0% and PWM output remains constant at 0.
The timer count is held at H'00 and PWM output is inhibited. [Pin 4
PW1) is used for port 4 input/output, and its state depends on the corresponding port 4 data
register and data direction register.] Any value (such as N in figure 10.3) written in the DTR
becomes valid immediately.
a. The timer counter begins incrementing. The PWM output goes high when TCNT changes
b. When the count passes the DTR value, the PWM output goes low. [(c) in figure 10.3]
c. If the DTR value is changed (by writing the data “M” in figure 10.3), the new value
should be made before the output enable bit (OE) is set to 1.
If the DTR value is H'FA to H'FF, the duty cycle is 100% and PWM output remains constant at
1.
(For direct output, 0 is low and 1 is high. For inverted output, 0 is high and 1 is low.)
from H'00 to H'01, unless DTR = H'00. [(b) in figure 10.3]
becomes valid after the timer count changes from H'F9 to H'00. [(d) in figure 10.3]
Application Notes
6
(for PW0) or pin 4
7
(for
221