HD64F3337YCP16V Renesas Electronics America, HD64F3337YCP16V Datasheet - Page 88

MCU 3/5V 60K PB-FREE 84-PLCC

HD64F3337YCP16V

Manufacturer Part Number
HD64F3337YCP16V
Description
MCU 3/5V 60K PB-FREE 84-PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheets

Specifications of HD64F3337YCP16V

Core Size
8-Bit
Program Memory Size
60KB (60K x 8)
Oscillator Type
Internal
Core Processor
H8/300
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
No. Of I/o's
74
Ram Memory Size
1KB
Cpu Speed
16MHz
No. Of Timers
6
No. Of Pwm Channels
2
Digital Ic Case Style
PLCC
Controller Family/series
H8/300
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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2.6.2
In this state the CPU executes program instructions.
2.6.3
The exception-handling state is a transient state that occurs when the CPU is reset or interrupted
and changes its normal processing flow. In interrupt exception handling, the CPU references the
stack pointer (R7) and saves the program counter and condition code register on the stack. For
further details see section 4, Exception Handling.
56
Notes: 1.
Program Execution State
Exception-Handling State
2.
RES = 1
A transition to the reset state occurs when RES goes low, except when the chip
is in the hardware standby mode.
A transition from any state to the hardware standby mode occurs when STBY
goes low.
handling state
Reset state
Exception-
Exception
handling
request
Figure 2.12 State Transitions
NMI, IRQ
to IRQ
STBY = 1, RES = 0
End of exception
handing
Interrupt request
execution state
2
Program
or IRQ
0
6
SLEEP
instruction
Sleep mode
Power-down state
standby mode
standby mode
Hardware
Software
SLEEP instruction
with SSBY bit set

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