HD64F3337YCP16V Renesas Electronics America, HD64F3337YCP16V Datasheet - Page 429

MCU 3/5V 60K PB-FREE 84-PLCC

HD64F3337YCP16V

Manufacturer Part Number
HD64F3337YCP16V
Description
MCU 3/5V 60K PB-FREE 84-PLCC
Manufacturer
Renesas Electronics America
Series
H8® H8/300r
Datasheets

Specifications of HD64F3337YCP16V

Core Size
8-Bit
Program Memory Size
60KB (60K x 8)
Oscillator Type
Internal
Core Processor
H8/300
Speed
16MHz
Connectivity
Host Interface, I²C, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
74
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 8x10b; D/A 2x8b
Operating Temperature
-20°C ~ 75°C
Package / Case
84-PLCC
No. Of I/o's
74
Ram Memory Size
1KB
Cpu Speed
16MHz
No. Of Timers
6
No. Of Pwm Channels
2
Digital Ic Case Style
PLCC
Controller Family/series
H8/300
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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Part Number:
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19.4.6
Flowchart for Erasing One Block
Address + 1
Erasing Flowchart and Sample Program
No
address
(set bit of block to be erased to 1)
Dummy write to verify address
(flash memory latches address)
(clear bit of erased block to 0)
Write 0 data in all addresses
Clear erase block register
Verify
Select erase-verify mode
Enable watchdog timer
Set top address in block
Set erase block register
to be erased (prewrite)
Disable watchdog timer
(EV bit = 1 in FLMCR)
(E bit = 1 in FLMCR)
Select erase mode
End of block erase
as verify address
Wait (t
Wait (t
OK
*4
Wait (x) ms
Last address?
Clear EV bit
Clear E bit
(read data H'FF?)
n = 1
Start
Figure 19.9 Erasing Flowchart
VS
VS
1) s
2) s
Yes
*5
*5
*5
*1
*2
*3
No go
Erasing ends
Clear EV bit
Erase error
Notes: *1 Program all addresses to be
n
N?
Yes
*2 Set the watchdog timer overflow
*3 For the erase-verify dummy write,
*4 Read the data to be verified with
*5 x:
*5
erased by following the prewrite
flowchart.
interval to the value indicated in
table 19.10.
write H'FF with a byte transfer
instruction.
a byte transfer instruction. When
erasing two or more blocks, clear
the bits of erased blocks in the
erase block registers, so that only
unerased blocks will be erased
again.
t
t
N:
VS
VS
1: 4 s or more
2: 2 s or more
10 ms
3000
No
Erase-verify ends
n + 1
n
397

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