HD64F3337YCP16V Renesas Electronics America, HD64F3337YCP16V Datasheet - Page 327

• Manufacturer Part Number: HD64F3337YCP16V
• Description: MCU 3/5V 60K PB-FREE 84-PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16V

• Core Size: 8-Bit
• Program Memory Size: 60KB (60K x 8)
• Oscillator Type: Internal
• Core Processor: H8/300
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• No. Of I/o's: 74
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 6
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PLCC
• Controller Family/series: H8/300
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

13.3
13.3.1
The I
figure 13.3, and a non-addressing format, shown as (c) in figure 13.4. The first byte following a
start condition always consists of 8 bits. Figure 13.5 shows the I
Legend:
S:
SLA:
R/W:
A:
(a) Addressing format (FS = 0)
(b) Addressing format (retransmit start condition, FS = 0)
S
S
1
1
(c) Non-addressing format (FS = 1)
2
C bus interface has three data formats: two addressing formats, shown as (a) and (b) in
S
1
Operation
I
Start condition. The master device drives SDA from high to low while SCL is high.
Slave address, by which the master device selects a slave device.
Indicates the direction of data transfer: from the slave device to the master device when
R/W is 1, or from the master device to the slave device when R/W is 0.
Acknowledge. The receiving device (the slave in master transmit mode, or the master in
master receive mode) drives SDA low to acknowledge a transfer. If transfers need not be
SLA
SLA
2
7
7
C Bus Data Format
DATA
Figure 13.4 I
1
1
Figure 13.3 I
8
R/W
R/W
1
1
1
A
A
1
1
A
1
2
DATA
DATA
C Bus Data Format (Non-Acknowledge Format)
n1
2
n
C Bus Data Formats (Acknowledge Formats)
DATA
m1
n
A
1
A/A
m
1
A
1
S
1
m
n1 and n2: bit count (n1 and n2 = 1 to 8)
m1 and m2: frame count (m1 and m2
SLA
A/A
1
7
P
1
1
R/W
2
C bus timing.
1
m: frame count
(m
n: bit count
(n = 1 to 8)
A/A
1
1)
A
1
P
1
DATA
n2
m: frame count
(m
n: bit count
(n = 1 to 8)
m2
1)
1)
A/A
1
1
P
295