HD64F3337YCP16V Renesas Electronics America, HD64F3337YCP16V Datasheet - Page 273

• Manufacturer Part Number: HD64F3337YCP16V
• Description: MCU 3/5V 60K PB-FREE 84-PLCC
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300r

Specifications of HD64F3337YCP16V

• Core Size: 8-Bit
• Program Memory Size: 60KB (60K x 8)
• Oscillator Type: Internal
• Core Processor: H8/300
• Speed: 16MHz
• Connectivity: Host Interface, I²C, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 74
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 84-PLCC
• No. Of I/o's: 74
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• No. Of Timers: 6
• No. Of Pwm Channels: 2
• Digital Ic Case Style: PLCC
• Controller Family/series: H8/300
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Bit 6—Receive Interrupt Enable (RIE): This bit enables or disables the receive-end interrupt
(RXI) requested when the receive data register full (RDRF) bit in the serial status register (SSR) is
set to 1, and the receive error interrupt (ERI) requested when the overrun error (ORER), framing
error (FER), or parity error (PER) bit in the serial status register (SSR) is set to 1.
Bit 6: RIE
0
1
Bit 5—Transmit Enable (TE): This bit enables or disables the transmit function. When the
transmit function is enabled, the TxD pin is automatically used for output. When the transmit
function is disabled, the TxD pin can be used as a general-purpose I/O port.
Bit 5: TE
0
1
Bit 4—Receive Enable (RE): This bit enables or disables the receive function. When the receive
function is enabled, the RxD pin is automatically used for input. When the receive function is
disabled, the RxD pin is available as a general-purpose I/O port.
Bit 4: RE
0
1
Bit 3—Multiprocessor Interrupt Enable (MPIE): When serial data is received in a
multiprocessor format, this bit enables or disables the receive-end interrupt (RXI) and receive-
error interrupt (ERI) until data with the multiprocessor bit set to 1 is received. It also enables or
disables the transfer of received data from RSR to RDR, and enables or disables setting of the
RDRF, FER, PER, and ORER bits in the serial status register (SSR).
The MPIE bit is ignored when the MP bit is cleared to 0, and in synchronous mode.
Clearing the MPIE bit to 0 disables the multiprocessor receive interrupt function. In this condition
data is received regardless of the value of the multiprocessor bit in the receive data.
Description
The receive-end interrupt (RXI) and receive-error (ERI) requests are disabled.
The receive-end interrupt (RXI) and receive-error (ERI) requests are enabled.
Description
The transmit function is disabled.
The TxD pin can be used for general-purpose I/O.
The transmit function is enabled. The TxD pin is used for output.
Description
The receive function is disabled. The RxD pin can be used for general-purpose
I/O.
The receive function is enabled. The RxD pin is used for input.
(Initial value)
(Initial value)
(Initial value)
241