WM8352GEB/V Wolfson Microelectronics, WM8352GEB/V Datasheet - Page 109

Audio CODECs Audio CODEC plus pwr management

WM8352GEB/V

Manufacturer Part Number
WM8352GEB/V
Description
Audio CODECs Audio CODEC plus pwr management
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8352GEB/V

Number Of Adc Inputs
2
Number Of Dac Outputs
2
Conversion Rate
48 KSPS
Interface Type
Serial (2-Wire, 3-Wire, 4-Wire)
Resolution
12 bit
Operating Supply Voltage
3.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
BGA
Minimum Operating Temperature
- 25 C
Number Of Channels
2 ADC/2 DAC
Supply Current
260 uA
Thd Plus Noise
- 83 dB
Audio Codec Type
Stereo
No. Of Adcs
2
No. Of Dacs
2
No. Of Input Channels
8
No. Of Output Channels
6
Adc / Dac Resolution
24bit
Adcs / Dacs Signal To Noise Ratio
95dB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Production Data
w
R39 (27h)
Comparator
Interrupt
Status Mask
Table 55 Wake-Up Interrupts
14.3.2
The WM8352 power supply blocks can be commanded to start up according to a defined sequence
when the WM8352 is commanded into the ACTIVE state. This sequence comprises fourteen
timeslots, where the enabling of each DC-DC converter, LDO voltage regulator and the current limit
switch is associated with one timeslot. In order to minimise supply in-rush current at power-up time,
the start-up of these power supply blocks should be staggered in time by the use of this feature.
The WM8352 proceeds from one time slot to the next after a delay of approximately 1.28ms,
provided that all power supply blocks started up in the current time slot (if any) have reached 90% of
their programmed output voltage. See Section 14.3.4 for details of the WM8352 behaviour if any
power supply block fails to achieve 90% of its programmed output voltage.
14.3.3
The WM8352 goes from ACTIVE or HIBERNATE to the OFF state when a shutdown event occurs.
Shutdown events include:
As part of the start-up sequence, the CHIP_ON bit is set to 1. The software shutdown is commanded
by writing 0 to the CHIP_ON register field as described in Table 56.
ADDRESS
SHUTDOWN
POWER-UP SEQUENCING
Software shutdown (setting CHIP_ON = 0)
A trigger signal on a GPIO pin configured as PWR_OFF lasting more than 5ms. The active
polarity of this input is set by GPn_CFG for the applicable GPIO pin (see Section 20).
A trigger signal on the ON pin lasting more than 10 seconds. The active polarity of this
input is set by the register field ON_POL. If required, the de-bounce time can be set to 5
seconds using the ON_DEB_T register bit.
Watchdog time-out (see Section 23) after 7 previous faults.
Fault conditions programmed to trigger a shutdown (see Section 18).
Thermal shutdown (see Section 25)
BIT
6:0
2
1
0
WKUP_GP_PWR_ON_EINT
WKUP_ONKEY_EINT
WKUP_GP_WAKEUP_EINT
“IM_” + name of respective
bit in R31
LABEL
PWR_ON (Alternate GPIO function) pin
has been pressed for longer than
specified time.
(Rising Edge triggered)
Note: This bit is cleared once read.
ON key has been pressed for longer than
specified time.
(Rising Edge triggered)
Note: This bit is cleared once read.
has been pressed for longer than
specified time.
(Rising Edge triggered)
Note: This bit is cleared once read.
Interrupt mask.
0 = Do not mask interrupt.
1 = Mask interrupt.
Each bit in R39 enables or masks the
corresponding bit in R31. The default
value for these bits is 0 (unmasked).
WAKEUP (Alternate GPIO function) pin
DESCRIPTION
PD, March 2010, Rev 4.2
WM8352
109

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