WM8352GEB/V Wolfson Microelectronics, WM8352GEB/V Datasheet - Page 135

Audio CODECs Audio CODEC plus pwr management

WM8352GEB/V

Manufacturer Part Number
WM8352GEB/V
Description
Audio CODECs Audio CODEC plus pwr management
Manufacturer
Wolfson Microelectronics
Datasheet

Specifications of WM8352GEB/V

Number Of Adc Inputs
2
Number Of Dac Outputs
2
Conversion Rate
48 KSPS
Interface Type
Serial (2-Wire, 3-Wire, 4-Wire)
Resolution
12 bit
Operating Supply Voltage
3.7 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
BGA
Minimum Operating Temperature
- 25 C
Number Of Channels
2 ADC/2 DAC
Supply Current
260 uA
Thd Plus Noise
- 83 dB
Audio Codec Type
Stereo
No. Of Adcs
2
No. Of Dacs
2
No. Of Input Channels
8
No. Of Output Channels
6
Adc / Dac Resolution
24bit
Adcs / Dacs Signal To Noise Ratio
95dB
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Production Data
14.7 CONFIGURING THE LDO REGULATORS
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The configuration of the LDO Regulators is described in the following sections. Some of the control
fields form part of the Custom Mode configuration settings and therefore will not require to be set in
software in some applications.
14.7.1
The LDO Regulators can be enabled in software using the register fields defined in Table 81. To
reduce supply in-rush current, individual regulators should be programmed to start in different time
slots within the start-up sequence.
In the WM8352 ACTIVE state, the LDO Regulators can be enabled in software using the LDOn_ENA
bits. Setting these bits whilst in the Pre-Active state (see Figure 65) will not immediately enable the
corresponding LDO Regulators; these bits will only become effective once the WM8352 has reached
the ACTIVE state.
Each Regulator may be programmed to switch on in a selected timeslot within the start-up sequence.
The WM8352 will set the LDOn_ENA field for any LDO Regulator that is enabled during the start-up
sequence. Note that setting the LDOn_ENSLOT fields in software is only relevant to the
Development Mode, as these fields are assigned preset values in each of the Custom Modes.
Each Regulator may be programmed to switch off in a selected timeslot within the shutdown
sequence. If a Regulator is not allocated to one of the 14 shutdown timeslots, it will be disabled when
the WM8352 enters the OFF state.
R13 (0Dh) or
R176 (B0h)
DC-DC / LDO
requested
Note: These bits can be accessed through R13 or through R176. Reading from or writing to either
register location has the same effect.
ADDRESS
LDO REGULATOR ENABLE
BIT
10
11
8
9
LDO1_ENA
LDO2_ENA
LDO3_ENA
LDO4_ENA
LABEL
DEFAULT
0
0
0
0
LDO1 enable
0 = disabled
1 = enabled
Note: internal conditions may prevent the
converter from actually switching on -
see DCDC/LDO Status register for actual
converter status.
LDO2 enable
0 = disabled
1 = enabled
Note: internal conditions may prevent the
converter from actually switching on -
see DCDC/LDO Status register for actual
converter status.
LDO3 enable
0 = disabled
1 = enabled
Note: internal conditions may prevent the
converter from actually switching on -
see DCDC/LDO Status register for actual
converter status.
LDO4 enable
0 = disabled
1 = enabled
Note: internal conditions may prevent the
converter from actually switching on -
see DCDC/LDO Status register for actual
converter status.
DESCRIPTION
PD, March 2010, Rev 4.2
WM8352
135

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