WM8352GEB/V Wolfson Microelectronics, WM8352GEB/V Datasheet - Page 66

• Manufacturer Part Number: WM8352GEB/V
• Description: Audio CODECs Audio CODEC plus pwr management
• Manufacturer: Wolfson Microelectronics

Specifications of WM8352GEB/V

• Number Of Adc Inputs: 2
• Number Of Dac Outputs: 2
• Conversion Rate: 48 KSPS
• Interface Type: Serial (2-Wire, 3-Wire, 4-Wire)
• Resolution: 12 bit
• Operating Supply Voltage: 3.7 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Package / Case: BGA
• Minimum Operating Temperature: - 25 C
• Number Of Channels: 2 ADC/2 DAC
• Supply Current: 260 uA
• Thd Plus Noise: - 83 dB
• Audio Codec Type: Stereo
• No. Of Adcs: 2
• No. Of Dacs: 2
• No. Of Input Channels: 8
• No. Of Output Channels: 6
• Adc / Dac Resolution: 24bit
• Adcs / Dacs Signal To Noise Ratio: 95dB
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

WM8352
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13.4.4
The gain of each microphone pre-amplifier is controlled by writing to the appropriate control registers.
The gain of each pre-amplifier applies to all three inputs associated with that pre-amplifier, whether
inverting or non-inverting. Although the gain settings for each pre-amplifier are in two separate
registers, both gains can be changed simultaneously using the IN_VU bit (see Table 22).
Additionally, it is also possible to control the gain updates to only occur when the respective signal
crosses through zero. This feature reduces clicking noise caused by gain changes.
R80 (50h)
Left Input
Volume
R81 (51h)
Right Input
Volume
Table 22 Controlling the Microphone Pre-amplifier Gain
ADDRESS
CONTROLLING THE PRE-AMPLIFIER GAINS
BIT
7:2
7:2
14
13
14
13
8
8
INL_MUTE
INL_ZC
IN_VU
INL_VOL
[5:0]
INR_MUTE
INR_ZC
IN_VU
INR_VOL
[5:0]
LABEL
DEFAULT
01_0000
01_0000
0
0
0
0
0
0
Mute control for left channel input PGA:
0 = Input PGA not muted, normal operation
1 = Input PGA muted (and disconnected from
the following input record mixer).
Left channel input PGA zero cross enable:
0 = Update gain when gain register changes
1 = Update gain on 1st zero cross after gain
register write.
Input left PGA and input right PGA volume do
not update until a 1 is written to either IN_VU
register bit.
Left channel input PGA volume
000000 = -12dB
000001 = -11.25dB
.
010000 = 0dB
.
111111 = 35.25dB
Mute control for right channel input PGA:
0 = Input PGA not muted, normal operation
1 = Input PGA muted (and disconnected from
the following input record mixer).
Right channel input PGA zero cross enable:
0 = Update gain when gain register changes
1 = Update gain on 1st zero cross after gain
register write.
Input left PGA and input right PGA volume do
not update until a 1 is written to either IN_VU
register bit.
Right channel input PGA volume
000000 = -12dB
000001 = -11.25dB
.
010000 = 0dB
.
111111 = 35.25dB
DESCRIPTION
PD, March 2010, Rev 4.2
Production Data
66